Datasheet

 2011-2012 Microchip Technology Inc. DS70652E-page 167
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
FIGURE 12-2: TIMER2 AND TIMER4 (16-BIT) BLOCK DIAGRAM
(1)
FIGURE 12-3: TIMER3 AND TIMER5 (16-BIT) BLOCK DIAGRAM
(1)
TON
TCKPS<1:0>
Prescaler
1, 8, 64, 256
2
TCY
TCS
TGATE
TxCK
PRx
Set TxIF
Equal
Comparator
TMRx
Reset
Q
QD
CK
TGATE
1
0
Gate
Sync
1x
01
00
Sync
To CTMU F i l t e r
Note 1: Timer4 is available in dsPIC33FJ32(GP/MC)10X devices only.
Prescaler
(/n)
Gate
Sync
TGATE
TCS
00
10
x1
TMRx
PRx
FCY
TGATE
Set TxIF Flag
0
1
Sync
TCKPS<1:0>
Equal
Reset
TxCK
ADC SOC Trigger
Prescaler
(/n)
TCKPS<1:0>
To CT M U Fil t er
Note 1: Timer5 is available in dsPIC33FJ32(GP/MC)10X devices only.
Falling Edge
Detect
Comparator