Information
2010-2012 Microchip Technology Inc. DS80461G-page 7
dsPIC33FJ12MC201/202
20. Module: I
2
C
In 10-bit Addressing mode, some address
matches do not set the RBF flag or load the
receive register, I2CxRCV, if the lower address
byte matches the reserved addresses. In
particular, these include all addresses with the
form XX0000XXXX and XX1111XXXX, with the
following exceptions:
• 001111000X
• 011111001X
• 101111010X
• 111111011X
Work around
Ensure that the lower address byte in 10-bit
Addressing mode does not match any 7-bit
reserved addresses.
Affected Silicon Revisions
21. Module: I
2
C
When the I
2
C module is operating in either Master
or Slave mode, after the ACKSTAT bit is set when
receiving a NACK, it may be cleared by the
reception of a Start or Stop bit.
Work around
Store the value of the ACKSTAT bit immediately
after receiving a NACK.
Affected Silicon Revisions
22. Module: CPU
The EXCH instruction does not execute correctly.
Work around
If writing source code in assembly, the
recommended work around is to replace:
EXCH Wsource, Wdestination
with:
PUSH Wdestination
MOV Wsource, Wdestination
POP Wsource
If using the MPLAB C30 C compiler, specify the
compiler option: -merrata=exch (Project > Build
Options > Projects > MPLAB C30 > Use Alternate
Settings).
Affected Silicon Revisions
23. Module: PWM
If the PTDIR bit is set (when PTMR is counting
down), and the CPU execution is halted (after a
breakpoint is reached), PTMR will start counting
up as if PTDIR was zero.
Work around
None.
Affected Silicon Revisions
24. Module: PWM
When the device is operated in DOZE mode and
the Motor Control PWM module has a postscaler
set to any value different than 1:1 (PTOPS > 0 in
PxTCON register), the Motor Control PWM
module generates more interrupts than expected.
Work around
Do not use DOZE mode with the Motor Control
PWM if the time base output postscaler is different
than 1:1 (PTOPS > 0 in PxTCON register).
Affected Silicon Revisions
A2 A3 A4 A5
XXX
X
A2 A3 A4
A5
XXX
X
A2 A3 A4 A5
XXX
X
A2 A3 A4
A5
XXX
X
A2 A3 A4
A5
XXX
X