Information

dsPIC33FJ12MC201/202
DS80461G-page 10  2010-2012 Microchip Technology Inc.
31. Module: CPU
When using the Signed 32-by-16-bit Division
instruction, div.sd, the overflow bit does not
always get set when an overflow occurs.
Work around
Test for and handle overflow conditions outside of
the div.sd instruction.
Affected Silicon Revisions
32. Module: UART
When using UTXISEL = 01 (Interrupt when last
character is shifted out of the Transmit Shift
Register) and the final character is being shifted
out through the Transmit Shift Register, the
Transmit (TX) Interrupt may occur before the final
bit is shifted out.
Work around
If it is critical that the interrupt processing occur
only when all transmit operations are complete.
Hold off the interrupt routine processing by adding
a loop at the beginning of the routine that polls the
Transmit Shift Register Empty bit (TRMT) before
processing the rest of the interrupt.
Affected Silicon Revisions
33. Module: JTAG
JTAG Flash programming is not supported.
Work around
None.
Affected Silicon Revisions
A2 A3 A4 A5
XXX
X
A2 A3 A4 A5
XXX
X
A2 A3 A4 A5
XXX
X