Information

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
DS70152H-page 82 © 2010 Microchip Technology Inc.
Revision H (October 2010)
This revision includes the following updates:
• Text and formatting updates have been
incorporated throughout the document
• All references to V
CAP/VDDCORE have been
changed to: VCAP
• All occurrences of PGC and PGD have been
changed to PGCx and PGDx, respectively
• Added topics covered in Section 1.0 “Device
Overview”
• Moved the Checksum Computation table to the
appendix (see Ta b l e D-1)
• Updated all occurrences of TBLPG to TBLPAG
throughout the document
• Removed the ERASEB command from the
Command Set Summary (see Ta b l e 3-1)
• Updated the High-Level Enhanced ICSP™
Programming Flow (see Figure 3-1)
• Replaced the Device Configuration Register Map
(previously Table 4-3) with individual tables for
each dsPIC33F/PIC24H device family (see
Table 3-3 through Table 3-12)
• Updated the Note in Section 3.6.2
“Programming Methodology”
• Changed Opcode 0x7 to Reserved in the
Programming Executive Command Set (see
Table 4-1)
• Removed 4.2.10 “ERASEB Command”
• Updated the table cross-references in
Section 5.7 “Writing Configuration Memory”
• Combined all Default Configuration Register
Values tables into one table (see Ta b l e 5-6)
• Relocated the paragraph on ICSP programming
details, which now appears just before Table 5-7
• Added a Note to Section 6.1 “Overview”
• Updated Step 4 in Programming the Programming
Executive (see Table 6-1)
• Updated Device IDs and Revision IDs (see
Table 7-1)
• Updated parameters D111, P1, P1A and P1B in
the AC/DC Characteristics and Timing
Requirements (see Table 8-1)
• Added Checksum Computation Example When
Using CodeGuard™ Security (see Table D-2).