Information

© 2010 Microchip Technology Inc. DS70152H-page 81
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
Revision G (March 2009) (Continued)
• Removed PROGW and renamed QBLANK to
QBLANKEX in the Command Set Summary, and
added the following commands (see Ta b l e 3-1):
- ERASEB
- ERASEP
- CRCP
• Updated the flowchart in Figure 3-2
• Updated the second paragraph in Section 3.2
“Confirming the Presence of the Programming
Executive”
• Changed the CFGB calculation for
dsPIC33FJ06GS101/102/202 and
dsPIC33FJ16GS402/404/502/504 devices to:
+ (FPOR & 0x0F)
• Removed Note 2 in Section 3.6.1 “Overview”
• Updated the Erased Value and Value with
0xAAAAAA at 0x0 and Last Code Address
columns in Table 3-2 for the following devices:
- dsPIC33FJ64GP202
- dsPIC33FJ64GP204
- dsPIC33FJ64GP802
- dsPIC33FJ64GP804
- dsPIC33FJ64MC202
- dsPIC33FJ64MC204
- dsPIC33FJ64MC802
- dsPIC33FJ64MC804
- PIC24HJ64GP202
- PIC24HJ64GP204
- PIC24HJ64GP502
- PIC24HJ64GP504
• Removed COE and BKBUG Configuration Bit
Descriptions in Table 3-2 and Table 3-3
• Added PLLKEN to FWDT in Table 3-2 and
Table 3-3
• Added ALTQIO and ALTSS1 to FPOR in
Table 3-2 and Table 3-3
• Removed Notes for the following Configuration Bit
Descriptions in Table 3-2:
-RBS
- RSS (removed Note 1)
- SSS
-SWRP
-IOL1WAY
-ALTI2C
-BOREN
• Added Note 6 and Note 7 to Table 3-3
• Added Note 1 to Figure 3-5
• Added Note to the beginning of Section 4.0 “The
Programming Executive”
• Updated the third paragraph in Section 4.1.1
“Communication Interface and Protocol” to
clarify the clock response time
• Changed the clock speed to be provided by the
programmer from 7.35 MHz to 1.85 MHz in
Section 4.1.2 “SPI Rate”
• Added Figure 5-2 and updated Figure 5-3
(formerly Figure 5-2)
• Removed FUID2 and FUID3 from Ta b l e 5 - 6
• Added new Default Configuration Register Value
table in support of dsPIC33FJ32GSX06/60X/610
and dsPIC33FJ64GSX06/60X/610 devices (see
Table 5-9)
• Updated description for FWDT and added Note 1
in Table 5 - 1 0
• Added seven new op code instructions to Step 3
in Table 6 - 1
• Updated Step 4 in Ta b l e 6 - 1 to reflect the TBLPG
pointer increment
• Added new columns (Application ID and JTAG ID)
to Ta b l e 7 - 1
• Added JTAG Type registers (see Register 7-1,
Register 7-2 and Register 7-3)
• The following updates were made to Table 8-1
- Updated parameters P1A and P1B and
added additional characteristics and values
- Updated characteristic for parameter P16
- Updated minimum value and units for
parameter P18
- Added new parameter P21