Datasheet

dsPIC33FJ12MC201/202
DS70265E-page 88 © 2007-2011 Microchip Technology Inc.
REGISTER 7-11: IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
R/W-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 U-0
FLTA1IE
— — — — QEIIE PWM1IE —
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 FLTA1IE: PWM1 Fault A Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 14-11 Unimplemented: Read as ‘0’
bit 10 QEIIE: QEI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 9 PWM1IE: PWM1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
bit 8-0 Unimplemented: Read as ‘0’