Datasheet
© 2007-2011 Microchip Technology Inc. DS70265E-page 289
dsPIC33FJ12MC201/202
Section 9.0 “I/O Ports” Added paragraph and Table 9-1 to Section 9.1.1 “Open-Drain Configuration”,
which provides details on I/O pins and their functionality.
Removed the following sections, which are now available in the related section
of the dsPIC33F Family Reference Manual:
• 9.4.2 “Available Peripherals”
• 9.4.3.3 “Mapping”
• 9.4.5 “Considerations for Peripheral Pin Selection”
Section 13.0 “Output Compare” Replaced sections 13.1, 13.2, and 13.3 and related figures and tables with
entirely new content.
Section 14.0 “Motor Control
PWM Module”
Removed the following sections, which are now available in the related section
of the dsPIC33F Family Reference Manual:
• 14.3 “PWM Time Base
• 14.4 “PWM Period”
• 14.5 “Edge-Aligned PWM”
• 14.6 “Center-Aligned PWM”
• 14.7 “PWM Duty Cycle Comparison Units”
• 14.8 “Complementary PWM Operation”
• 14.9 “Dead-Time Generators”
• 14.10 “Independent PWM Output”
• 14.11 “Single Pulse PWM Operation”
• 14.12 “PWM Output Override”
• 14.13 “PWM Output and Polarity Control
• 14.14 “PWM Fault Pins”
• 14.15 “PWM Update Lockout”
• 14.16 “PWM Special Event Trigger”
• 14.17 “PWM Operation During CPU Sleep Mode”
• 14.18 “PWM Operation During CPU Idle Mode
Section 15.0 “Quadrature
Encoder Interface (QEI) Module”
Removed the following sections, which are now available in the related section
of the dsPIC33F Family Reference Manual:
• 15.1 “Quadrature Encoder Interface Logic”
• 15.2 “16-bit Up/Down Position Counter Mode”
• 15.3 “Position Measurement Mode”
• 15.4 “Programmable Digital Noise Filters”
• 15.5 “Alternate 16-bit Timer/Counter”
• 15.6 QEI Module Operation During CPU Sleep Mode”
• 15.7 “QEI Module Operation During CPU Idle Mode”
• 15.8 “Quadrature Encoder Interface Interrupts”
Section 16.0 “Serial Peripheral
Interface (SPI)”
Removed the following sections, which are now available in the related section
of the dsPIC33F Family Reference Manual:
• 16.1 “Interrupts”
• 16.2 “Receive Operations”
• 16.3 “Transmit Operations”
• 16.4 “SPI Setup: Master Mode”
• 16.5 “SPI Setup: Slave Mode” (retained Figure 16-1: SPI Module Block
Diagram)
TABLE 25-1: MAJOR SECTION UPDATES
Section Name Update Description