Datasheet

© 2007-2011 Microchip Technology Inc. DS70264E-page 255
dsPIC33FJ12GP201/202
SPIxCON1 (SPIx Control 1)...................................... 145
SPIxCON2 (SPIx Control 2)...................................... 147
SPIxSTAT (SPIx Status and Control) ....................... 144
SR (CPU Status)................................................... 22, 74
T1CON (Timer1 Control)........................................... 130
T2CON Control ......................................................... 134
T3CON Control ......................................................... 135
UxMODE (UARTx Mode).......................................... 158
UxSTA (UARTx Status and Control)......................... 160
Reset
Illegal Opcode ....................................................... 61, 67
Trap Conflict................................................................ 67
Uninitialized W Register.................................. 61, 67, 68
Reset Sequence ................................................................. 69
Resets................................................................................. 61
S
Serial Peripheral Interface (SPI) ....................................... 143
Software Reset Instruction (SWR) ...................................... 67
Software Simulator (MPLAB SIM)..................................... 191
Software Stack Pointer, Frame Pointer
CALL Stack Frame...................................................... 45
Special Features of the CPU ............................................ 175
SPI Module
SPI1 Register Map...................................................... 39
Symbols Used in Opcode Descriptions............................. 182
System Control
Register Map............................................................... 43
T
Temperature and Voltage Specifications
AC ............................................................................. 204
Timer1............................................................................... 129
Timer2/3............................................................................ 131
Timing Characteristics
CLKO and I/O ........................................................... 207
Timing Diagrams
10-bit A/D Conversion............................................... 234
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
= 0, SSRC = 000) ............................................. 234
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 233
Brown-out Situations................................................... 66
External Clock........................................................... 205
I2Cx Bus Data (Master Mode) .................................. 226
I2Cx Bus Data (Slave Mode) .................................... 228
I2Cx Bus Start/Stop Bits (Master Mode) ................... 226
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 228
Input Capture (CAPx)................................................ 212
OC/PWM................................................................... 213
Output Compare (OCx)............................................. 212
Reset, Watchdog Timer, Oscillator Start-up Timer and
Power-up Timer ................................................ 208
Timer1, 2 and 3 External Clock................................. 210
Timing Requirements
CLKO and I/O ........................................................... 207
DCI AC-Link Mode .................................................... 230
DCI Multi-Channel, I
2
S Modes.................................. 230
External Clock........................................................... 205
Input Capture ............................................................ 212
Timing Specifications
10-bit A/D Conversion Requirements ....................... 235
12-bit A/D Conversion Requirements ....................... 233
I2Cx Bus Data Requirements (Master Mode) ........... 226
I2Cx Bus Data Requirements (Slave Mode) ............. 229
Output Compare Requirements ................................ 212
PLL Clock.................................................................. 206
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
er-up Timer and Brown-out Reset Requirements...
209
Simple OC/PWM Mode Requirements ..................... 213
Timer1 External Clock Requirements....................... 210
Timer2 External Clock Requirements....................... 211
Timer3 External Clock Requirements....................... 211
U
UART Module
UART1 Register Map ................................................. 39
Using the RCON Status Bits............................................... 68
V
Voltage Regulator (On-Chip) ............................................ 178
W
Watchdog Time-out Reset (WDTR).................................... 67
Watchdog Timer (WDT)............................................ 175, 179
Programming Considerations ................................... 179
WWW Address ................................................................. 257
WWW, On-Line Support ....................................................... 8