Datasheet

dsPIC33FJ12GP201/202
DS70264E-page 114 © 2007-2011 Microchip Technology Inc.
TABLE 10-1: SELECTABLE INPUT SOURCES (MAPS INPUT TO FUNCTION)
(1)
10.4.2.2 Output Mapping
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a
particular pin dictates the peripheral output to be
mapped. The RPORx registers are used to control
output mapping. Like the RPINRx registers, each
register contains sets of 5-bit fields, with each set
associated with one RPn pin (see Register 10-10
through Register 10-17). The value of the bit field
corresponds to one of the peripherals, and that
peripheral’s output is mapped to the pin (see
Table 10-2 and Figure 10-2).
The list of peripherals for output mapping also includes
a null value of ‘00000’ because of the mapping
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
FIGURE 10-3: MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
Input Name Function Name Register
Configuration
Bits
External Interrupt 1 INT1 RPINR0 INT1R<4:0>
External Interrupt 2 INT2 RPINR1 INT2R<4:0>
Timer2 External Clock T2CK RPINR3 T2CKR<4:0>
Timer3 External Clock T3CK RPINR3 T3CKR<4:0>
Input Capture 1 IC1 RPINR7 IC1R<4:0>
Input Capture 2 IC2 RPINR7 IC2R<4:0>
Input Capture 7 IC7 RPINR10 IC7R<4:0>
Input Capture 8 IC8 RPINR10 IC8R<4:0>
Output Compare Fault A OCFA RPINR11 OCFAR<4:0>
UART1 Receive U1RX RPINR18 U1RXR<4:0>
UART1 Clear To Send U1CTS
RPINR18 U1CTSR<4:0>
SPI1 Data Input SDI1 RPINR20 SDI1R<4:0>
SPI1 Clock Input SCK1IN RPINR20 SCK1R<4:0>
SPI1 Slave Select Input SS1IN RPINR21 SS1R<4:0>
Note 1: Unless otherwise noted, all inputs use the Schmitt input buffers.
0
19
3
RPnR<4:0>
Default
U1TX Output Enable
U1RTS Output Enable
4
18
OC1 Output Enable
0
19
3
Default
U1TX Output
U1RTS Output
4
OC2 Output
18
OC1 Output
Output Enable
Output Data
RPn
OC2 Output Enable