Datasheet

© 2007-2012 Microchip Technology Inc. DS70291G-page 47
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
TABLE 4-7: OUTPUT COMPARE REGISTER MAP
SFR Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
OC1RS 0180 Output Compare 1 Secondary Register xxxx
OC1R 0182 Output Compare 1 Register xxxx
OC1CON 0184
— —
OCSIDL — — — — — — — — OCFLT OCTSEL OCM<2:0> 0000
OC2RS 0186 Output Compare 2 Secondary Register xxxx
OC2R 0188 Output Compare 2 Register xxxx
OC2CON 018A — — OCSIDL — — — — — — — — OCFLT OCTSEL OCM<2:0> 0000
OC3RS 018C Output Compare 3 Secondary Register xxxx
OC3R 018E Output Compare 3 Register xxxx
OC3CON 0190 — — OCSIDL — — — — — — — — OCFLT OCTSEL OCM<2:0> 0000
OC4RS 0192 Output Compare 4 Secondary Register xxxx
OC4R 0194 Output Compare 4 Register xxxx
OC4CON 0196 — — OCSIDL — — — — — — — — OCFLT OCTSEL OCM<2:0> 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-8: 6-OUTPUT PWM1 REGISTER MAP
SFR Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
State
P1TCON 01C0 PTEN
—PTSIDL — — — — — PTOPS<3:0> PTCKPS<1:0> PTMOD<1:0> 0000
P1TMR 01C2 PTDIR PWM Timer Count Value Register 0000
P1TPER 01C4 — PWM Time Base Period Register 0000
P1SECMP 01C6 SEVTDIR PWM Special Event Compare Register 0000
PWM1CON1 01C8 — — — — — PMOD3 PMOD2 PMOD1 — PEN3H PEN2H PEN1H — PEN3L PEN2L PEN1L 00FF
PWM1CON2 01CA — — — —SEVOPS<3:0> — — — — — IUE OSYNC UDIS 0000
P1DTCON1 01CC DTBPS<1:0> DTB<5:0> DTAPS<1:0> DTA<5:0> 0000
P1DTCON2 01CE — — — — — — — — — — DTS3A DTS3I DTS2A DTS2I DTS1A DTS1I 0000
P1FLTACON 01D0 — — FAOV3H FAOV3L FAOV2H FAOV2L FAOV1H FAOV1L FLTAM — — — — FAEN3 FAEN2 FAEN1 0000
P1OVDCON 01D4 — — POVD3H POVD3L POVD2H POVD2L POVD1H POVD1L — — POUT3H POUT3L POUT2H POUT2L POUT1H POUT1L FF00
P1DC1 01D6 PWM Duty Cycle 1 Register 0000
P1DC2 01D8 PWM Duty Cycle 2 Register 0000
P1DC3 01DA PWM Duty Cycle 3 Register 0000
Legend: u = uninitialized bit, — = unimplemented, read as ‘0’