Datasheet

© 2007-2012 Microchip Technology Inc. DS70291G-page 225
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 16-10: PxOVDCON: OVERRIDE CONTROL REGISTER
(1)
U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
POVD3H POVD3L POVD2H POVD2L POVD1H POVD1L
bit 15 bit 8
U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
POUT3H POUT3L POUT2H POUT2L POUT1H POUT1L
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0
bit 13-8 POVDxH<3:1>:POVDxL<3:1>: PWM Output Override bits
1 = Output on PWMx I/O pin is controlled by the PWM generator
0 = Output on PWMx I/O pin is controlled by the value in the corresponding POUTxH:POUTxL bit
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 POUTxH<3:1>:POUTxL<3:1>: PWM Manual Output bits
1 = PWMx I/O pin is driven active when the corresponding POVDxH:POVDxL bit is cleared
0 = PWMx I/O pin is driven inactive when the corresponding POVDxH:POVDxL bit is cleared
Note 1: PWM2 supports only one PWM I/O pin pair.