Datasheet

dsPIC33FJXXXMCX06/X08/X10
DS70287C-page 178 © 2009 Microchip Technology Inc.
FIGURE 16-1: PWM MODULE BLOCK DIAGRAM
PxDC4
PxDC4 Buffer
PWMxCON1
PWMxCON2
PxTPER
Comparator
Comparator
Channel 4 Dead-Time
Generator and
PxTCON
PxSECMP
Comparator
Special Event Trigger
PxFLTBCON
PxOVDCON
PWM Enable and Mode SFRs
PWM Manual
Control SFR
Channel 3 Dead-Time
Generator and
Channel 2 Dead-Time
Generator and
PWM
PWM
PWM Generator 4
SEVTDIR
PTDIR
PxDTCON1
Dead-Time Control SFRs
PWM1L
PWM1H
PWM2L
PWM2H
PWM3L
PWM3H
PWM
Channel 1 Dead-Time
Generator and
Note: For clarity, details of PWM Generator 1, 2 and 3 are not shown.
16-bit Data Bus
PWM4L
PWM4H
PxDTCON2
PxFLTACON
Fault Pin Control SFRs
PWM Time Base
Output
Driver
Block
FLTB
FLTA
Override Logic
Override Logic
Override Logic
Override Logic
Special Event
Postscaler
PxTPER Buffer
PxTMR
Generator 1
Generator 2
Generator 3