Datasheet

© 2009 Microchip Technology Inc. DS70287C-page 331
dsPIC33FJXXXMCX06/X08/X10
INDEX
A
A/D Converter ................................................................... 241
DMA .......................................................................... 241
Initialization ............................................................... 241
Key Features............................................................. 241
AC Characteristics ............................................................ 282
Internal RC Accuracy ................................................ 284
Load Conditions ........................................................ 282
ADC Module
ADC11 Register Map .................................................. 52
ADC2 Register Map .................................................... 52
Alternate Interrupt Vector Table (AIVT) .............................. 85
Arithmetic Logic Unit (ALU)................................................. 29
Assembler
MPASM Assembler................................................... 270
B
Barrel Shifter ....................................................................... 33
Bit-Reversed Addressing .................................................... 66
Example ...................................................................... 67
Implementation ........................................................... 66
Sequence Table (16-Entry)......................................... 67
Block Diagrams
16-bit Timer1 Module ................................................ 163
A/D Module ............................................................... 242
Connections for On-Chip Voltage Regulator............. 258
Device Clock ..................................................... 143, 145
DSP Engine ................................................................ 30
dsPIC33F .................................................................... 14
dsPIC33F CPU Core................................................... 24
ECAN Module ........................................................... 216
Input Capture ............................................................ 171
Output Compare ....................................................... 173
PLL............................................................................ 145
PWM Module ............................................................ 178
Quadrature Encoder Interface .................................. 191
Reset System.............................................................. 79
Shared Port Structure ............................................... 161
SPI ............................................................................ 195
Timer2 (16-bit) .......................................................... 167
Timer2/3 (32-bit) ....................................................... 166
UART ........................................................................ 209
Watchdog Timer (WDT) ............................................ 259
C
C Compilers
MPLAB C18 .............................................................. 270
MPLAB C30 .............................................................. 270
Clock Switching................................................................. 151
Enabling .................................................................... 151
Sequence.................................................................. 151
Code Examples
Erasing a Program Memory Page............................... 76
Initiating a Programming Sequence............................ 77
Loading Write Buffers ................................................. 77
Port Write/Read ........................................................ 162
PWRSAV Instruction Syntax..................................... 153
Code Protection ........................................................ 253, 260
Configuration Bits.............................................................. 253
Configuration Register Map .............................................. 253
Configuring Analog Port Pins............................................ 162
CPU
Control Register .......................................................... 26
CPU Clocking System ...................................................... 144
Options ..................................................................... 144
Selection................................................................... 144
Customer Change Notification Service............................. 335
Customer Notification Service .......................................... 335
Customer Support............................................................. 335
D
Data Accumulators and Adder/Subtractor .......................... 31
Data Space Write Saturation ...................................... 33
Overflow and Saturation ............................................. 31
Round Logic ............................................................... 32
Write Back .................................................................. 32
Data Address Space........................................................... 37
Alignment.................................................................... 37
Memory Map for dsPIC33FJXXXMCX06/X08/X10 De-
vices with 16 KB RAM ........................................ 39
Memory Map for dsPIC33FJXXXMCX06/X08/X10 De-
vices with 30 KB RAM ........................................ 40
Memory Map for dsPIC33FJXXXMCX06/X08/X10 De-
vices with 8 KB RAM .......................................... 38
Near Data Space ........................................................ 37
Software Stack ........................................................... 63
Width .......................................................................... 37
DC Characteristics............................................................ 274
I/O Pin Input Specifications ...................................... 279
I/O Pin Output Specifications.................................... 280
Idle Current (I
IDLE) .................................................... 277
Operating Current (I
DD) ............................................ 276
Power-Down Current (I
PD)........................................ 278
Program Memory...................................................... 281
Temperature and Voltage Specifications.................. 275
Development Support....................................................... 269
DMA Module
DMA Register Map ..................................................... 53
DMAC Registers............................................................... 134
DMAxCNT ................................................................ 134
DMAxCON................................................................ 134
DMAxPAD ................................................................ 134
DMAxREQ ................................................................ 134
DMAxSTA................................................................. 134
DMAxSTB................................................................. 134
DSP Engine ........................................................................ 29
Multiplier ..................................................................... 31
E
ECAN Module
CiFMSKSEL2 register .............................................. 233
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1)......... 55
ECAN1 Register Map (C1CTRL1.WIN = 0)................ 55
ECAN1 Register Map (C1CTRL1.WIN = 1)................ 56
ECAN2 Register Map (C2CTRL1.WIN = 0 or 1)......... 58
ECAN2 Register Map (C2CTRL1.WIN = 0).......... 58, 59
Frame Types ............................................................ 215
Modes of Operation .................................................. 217
Overview................................................................... 215
ECAN Registers
Filter 15-8 Mask Selection Register (CiFMSKSEL2) 233
Electrical Characteristics .................................................. 273
AC............................................................................. 282
Enhanced CAN Module .................................................... 215
Equations
Device Operating Frequency.................................... 144
Errata.................................................................................. 11