Datasheet

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
DS75018C-page 84  2011-2012 Microchip Technology Inc.
6.3 Power-on Reset (POR)
A Power-on Reset (POR) circuit ensures the device is
reset from power-on. The POR circuit is active until
V
DD crosses the VPOR threshold and the delay, TPOR,
has elapsed. The delay, TPOR, ensures the internal
device bias circuits become stable.
The device supply voltage characteristics must meet
the specified starting voltage and rise rate
requirements to generate the POR. Refer to
Section 25.0 “Electrical Characteristics” for details.
The POR status (POR) bit in the Reset Control
(RCON<0>) register is set to indicate the Power-on
Reset.
6.4 Brown-out Reset (BOR) and
Power-up Timer (PWRT)
The on-chip regulator has a Brown-out Reset (BOR)
circuit that resets the device when the VDD is too low
(VDD < VBOR) for proper device operation. The BOR
circuit keeps the device in Reset until V
DD crosses the
V
BOR threshold and the delay, TBOR, has elapsed. The
delay, TBOR, ensures the voltage regulator output
becomes stable.
The BOR status bit in the Reset Control (RCON<1>)
register is set to indicate the Brown-out Reset.
The device will not run at full speed after a BOR, as the
V
DD should rise to acceptable levels for full-speed
operation. The PWRT provides a Power-up Time Delay
(T
PWRT) to ensure that the system power supplies have
stabilized at the appropriate levels for full-speed
operation before the SYSRST
is released.
Figure 6-3 shows the typical brown-out scenarios. The
Reset delay (T
BOR + TPWRT) is initiated each time VDD
rises above the VBOR trip point.
FIGURE 6-3: BROWN-OUT SITUATIONS
VDD
SYSRST
VBOR
V
DD
SYSRST
VBOR
V
DD
SYSRST
VBOR
T
BOR + TPWRT
VDD Dips Before PWRT Expires
T
BOR + TPWRT
TBOR + TPWRT