Datasheet

 2011-2012 Microchip Technology Inc. DS75018C-page 51
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
TABLE 4-9: TIMER REGISTER MAP
TABLE 4-10: INPUT CAPTURE REGISTER MAP FOR dsPIC33FJ06GS202A AND dsPIC33FJ09GS302
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1 0102 Period Register 1 FFFF
T1CON 0104 TON —TSIDL— — — — — — TGATE TCKPS<1:0> — TSYNC TCS — 0000
TMR2 0106 Timer2 Register 0000
PR2 010C Period Register 2 FFFF
T2CON 0110 TON
—TSIDL— — — — — — TGATE TCKPS<1:0> — —TCS— 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
SFR
Name
SFR Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
IC1BUF 0140 Input Capture 1 Register xxxx
IC1CON 0142
— —ICSIDL — — — — — — ICI<1:0> ICOV ICBNE ICM<2:0> 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-11: OUTPUT COMPARE REGISTER MAP FOR dsPIC33FJ06GS101A, dsPIC33FJ06GS102A, dsPIC33FJ06GS202A
AND dsPIC33FJ09GS302
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
OC1RS 0180 Output Compare 1 Secondary Register xxxx
OC1R 0182 Output Compare 1 Register xxxx
OC1CON 0184 — —OCSIDL— — — — — — — —OCFLT—OCM<2:0>0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.