Datasheet

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
DS75018C-page 254 2011-2012 Microchip Technology Inc.
TABLE 22-3: dsPIC33F CONFIGURATION BITS DESCRIPTION
Bit Field Description
GCP
General Segment Code-Protect bit
1 = User program memory is not code-protected
0 = Code protection is enabled for the entire program memory space
GWRP General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
IESO Two-Speed Oscillator Start-up Enable bit
1 = Start up device with FRC, then automatically switch to the user-selected oscillator source
when ready
0 = Start up device with user-selected oscillator source
FNOSC<2:0> Oscillator Selection bits
111 = Fast RC Oscillator with divide-by-N (FRCDIVN)
110 = Reserved; do not use
101 = Low-Power RC Oscillator (LPRC)
100 = Reserved; do not use
011 = Primary Oscillator with PLL module (MS + PLL, EC + PLL)
010 = Primary Oscillator (MS, HS, EC)
001 = Fast RC Oscillator with divide-by-N with PLL module
(FRCDIVN + PLL)
000 = Fast RC Oscillator (FRC)
FCKSM<1:0> Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
IOL1WAY Peripheral Pin Select Configuration bit
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSCIOFNC OSC2 Pin Function bit (except in MS and HS modes)
1 = OSC2 is the clock output
0 = OSC2 is the general purpose digital I/O pin
POSCMD<1:0> Primary Oscillator Mode Select bits
11 = Primary Oscillator is disabled
10 = HS Crystal Oscillator mode (10 MHz-32 MHz)
01 = MS Crystal Oscillator mode (3 MHz-10 MHz)
00 = EC (External Clock) mode (DC-32 MHz)
FWDTEN Watchdog Timer Enable bit
1 = Watchdog Timer is always enabled (LPRC oscillator cannot be disabled; clearing the SWDTEN
bit in the RCON register will have no effect)
0 = Watchdog Timer is enabled/disabled by user software (LPRC can be disabled by clearing
the SWDTEN bit in the RCON register)
WDTPRE Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
WDTPOST<3:0> Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1