Datasheet

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
DS75018C-page 246  2011-2012 Microchip Technology Inc.
REGISTER 20-1: CMPCONx: COMPARATOR CONTROL x REGISTER
R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
CMPON
(1)
—CMPSIDL
(1)
HYSSEL<1:0>
(1)
FLTREN
(1)
FCLKSEL
(1)
DACOE
(1)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
INSEL<1:0>
(1)
EXTREF
(1)
HYSPOL
(1)
CMPSTAT
(1)
HGAIN
(1)
CMPPOL
(1)
RANGE
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CMPON: Comparator Operating Mode bit
(1)
1 = Comparator module is enabled
0 = Comparator module is disabled (reduces power consumption)
bit 14 Unimplemented: Read as ‘0’
bit 13 CMPSIDL: Stop in Idle Mode bit
(1)
1 = Discontinues module operation when device enters Idle mode.
0 = Continues module operation in Idle mode
If a device has multiple comparators, any CMPSIDL bit that is set to ‘1’ disables all comparators while
in Idle mode.
bit 12-11 HYSSEL<1:0>: Comparator Hysteresis Select bits
(1)
11 = 45 mV hysteresis
10 = 30 mV hysteresis
01 = 15 mV hysteresis
00 = No hysteresis is selected
bit 10 FLTREN: Digital Filter Enable bit
(1)
1 = Digital filter is enabled
0 = Digital filter is disabled
bit 9 FCLKSEL: Digital Filter and Pulse Stretcher Clock Select bit
(1)
1 = Digital filter and pulse stretcher operate with the PWM clock
0 = Digital filter and pulse stretcher operate with the system clock
bit 8 DACOE: DAC Output Enable
(1)
1 = DAC analog voltage is output to DACOUT pin
(2)
0 = DAC analog voltage is not connected to DACOUT pin
bit 7-6 INSEL<1:0>: Input Source Select for Comparator bits
(1)
11 = Select CMPxD input pin
10 = Select CMPxC input pin
01 = Select CMPxB input pin
00 = Select CMPxA input pin
Note 1: This bit is not implemented in dsPIC33FJ06GS101A/102A devices.
2: DACOUT can be associated only with a single comparator at any given time. The software must ensure
that multiple comparators do not enable the DAC output by setting their respective DACOE bit.
3: For the INTREF value, refer to the DAC Module Specifications (Table 25-42) in Section 25.0 “Electrical
Characteristics”.