Datasheet
2011-2012 Microchip Technology Inc. DS75018C-page 235
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
REGISTER 19-4: ADPCFG: ADC PORT CONFIGURATION REGISTER
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
bit 15 bit 8
R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG7
(1)
PCFG6
(1)
— — PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-8 Unimplemented: Read as ‘0’
bit 7-6 PCFG<7:6>: Analog-to-Digital Port Configuration Control bits
(1)
1 = Port pin is in Digital mode; port read input is enabled; Analog-to-Digital input multiplexer is
connected to AVSS
0 = Port pin is in Analog mode; port read input is disabled; Analog-to-Digital samples pin voltage
bit 5-4 Unimplemented: Read as ‘0’
bit 3-0 PCFG<3:0>: Analog-to-Digital Port Configuration Control bits
1 = Port pin is in Digital mode; port read input is enabled; Analog-to-Digital input multiplexer is
connected to AV
SS
0 = Port pin is in Analog mode; port read input is disabled; Analog-to-Digital samples pin voltage
Note 1: This bit is not implemented in dsPIC33FJ06GS102A/202A devices.
2: This bit is not implemented in dsPIC33FJ06GS001/101A devices.