Datasheet

 2011-2012 Microchip Technology Inc. DS75018C-page 221
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
18.3 UART Registers
REGISTER 18-1: U1MODE: UART1 MODE REGISTER
R/W-0 U-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0
UARTEN
(1,3)
—USIDL
(3)
IREN
(2,3)
RTSMD
(3)
—UEN<1:0>
(3)
bit 15 bit 8
R/W-0, HC R/W-0 R/W-0, HC R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
WAKE
(3)
LPBACK
(3)
ABAUD
(3)
URXINV
(3)
BRGH
(3)
PDSEL<1:0>
(3)
STSEL
(3)
bit 7 bit 0
Legend: HC = Hardware Clearable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 UARTEN: UART1 Enable bit
(1,3)
1 = UART1 is enabled; all UART1 pins are controlled by UART1, as defined by UEN<1:0>
0 = UART1 is disabled; all UART1 pins are controlled by port latches; UART1 power consumption
is minimal
bit 14 Unimplemented: Read as ‘0’
bit 13 USIDL: Stop in Idle Mode bit
(3)
1 = Discontinues module operation when device enters Idle mode
0 = Continues module operation in Idle mode
bit 12 IREN: IrDA
®
Encoder and Decoder Enable bit
(2,3)
1 =IrDA
®
encoder and decoder are enabled
0 =IrDA
®
encoder and decoder are disabled
bit 11 RTSMD: Mode Selection for U1RTS Pin bit
(3)
1 =U1RTS pin is in Simplex mode
0 =U1RTS
pin is in Flow Control mode
bit 10 Unimplemented: Read as ‘0’
bit 9-8 UEN<1:0>: UART1 Pin Enable bits
(3)
11 = U1TX, U1RX and BCLK pins are enabled and used; U1CTS
pin is controlled by port latches
10 = U1TX, U1RX, U1CTS and U1RTS pins are enabled and used
01 = U1TX, U1RX and U1RTS
pins are enabled and used; U1CTS pin is controlled by port latches
00 = U1TX and U1RX pins are enabled and used; U1CTS
and U1RTS/BCLK pins are controlled by
port latches
bit 7 WAKE: Wake-up on Start bit Detect During Sleep Mode Enable bit
(3)
1 = UART1 will continue to sample the U1RX pin; interrupt is generated on falling edge; bit is cleared
in hardware on following rising edge
0 = No wake-up is enabled
bit 6 LPBACK: UART1 Loopback Mode Select bit
(3)
1 = Enable Loopback mode
0 = Loopback mode is disabled
bit 5 ABAUD: Auto-Baud Enable bit
(3)
1 = Enable baud rate measurement on the next character – requires reception of a Sync field (0x55)
before other data; cleared in hardware upon completion
0 = Baud rate measurement is disabled or completed
Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F/PIC24H Family Reference Manual” for
information on enabling the UART module for receive or transmit operation.
2: This feature is only available for the 16x BRG mode (BRGH = 0).
3: This bit is not available in the dsPIC33FJ06GS001 device.