Datasheet

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302

DS75018C-page 204  2011-2012 Microchip Technology Inc.

R/W-0 R/W-0 U-0 U-0 U-0 U-0 U-0 UW-0

HRPDIS HRDDIS

— — — — — —

bit 15 bit 8

U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

— — CHOPSEL<3:0> CHOPHEN CHOPLEN

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown

bit 15 HRPDIS: High-Resolution PWMx Period Disable bit

1 = High-resolution PWMx period is enabled

0 = High-resolution PWMx period is disabled

bit 14 HRDDIS: High-Resolution PWMx Duty Cycle Disable bit

1 = High-resolution PWMx duty cycle is enabled

0 = High-resolution PWMx duty cycle is disabled

bit 13-6 Unimplemented: Read as ‘0’

bit 5-2 CHOPSEL<3:0>: PWMx Chop Clock Source Select bits

The selected signal will enable and disable (CHOP) the selected PWMx outputs.

1001 = Reserved

1000 = Reserved

0111 = Reserved

0110 = Reserved

0101 = Reserved

0100 = PWM4H is selected as CHOP clock source

0011 = Reserved

0010 = PWM2H is selected as CHOP clock source

0001 = PWM1H is selected as CHOP clock source

0000 = Chop clock generator is selected as CHOP clock source

bit 1 CHOPHEN: PWMxH Output Chopping Enable bit

1 = PWMxH chopping function is enabled

0 = PWMxH chopping function is disabled

bit 0 CHOPLEN: PWMxL Output Chopping Enable bit

1 = PWMxL chopping function is enabled

0 = PWMxL chopping function is disabled