Datasheet

 2011-2012 Microchip Technology Inc. DS75018C-page 203
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
REGISTER 15-19: PWMCAPx: PRIMARY PWMx TIME BASE CAPTURE REGISTER
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
PWMCAP<15:8>
(1,2)
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 U-0 U-0 U-0
PWMCAP<7:3>
(1,2)
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-3 PWMCAP<15:3>: Captured PWM Time Base Value bits
(1,2)
The value in this register represents the captured PWM time base value when a leading edge is
detected on the current-limit input.
bit 2-0 Unimplemented: Read as ‘0’
Note 1: The capture feature is only available on primary output (PWMxH).
2: This feature is active only after LEB processing on the current-limit input signal is complete.
REGISTER 15-20: CHOP: PWM CHOP CLOCK GENERATOR REGISTER
R/W-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
CHPCLKEN — — — — —CHOPCLK<6:5>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0
CHOPCLK<4:0>
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CHPCLKEN: Enable Chop Clock Generator bit
1 = Chop clock generator is enabled
0 = Chop clock generator is disabled
bit 14-10 Unimplemented: Read as ‘0’
bit 9-3 CHOPCLK<6:0>: Chop Clock Divider bits
The frequency of the chop clock signal is given by the following expression:
Chop Frequency = 1/(16.64 * (CHOPCLK<6:0> + 1) * Primary Master PWM Input Clock/PCLKDIV<2:0>)
bit 2-0 Unimplemented: Read as ‘0’