Datasheet

 2011-2012 Microchip Technology Inc. DS75018C-page 197
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
REGISTER 15-14: IOCONx: PWMx I/O CONTROL REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PENH PENL POLH POLL PMOD<1:0>
(1)
OVRENH OVRENL
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
OVRDAT<1:0> FLTDAT<1:0>
(2)
CLDAT<1:0>
(2)
SWAP OSYNC
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 PENH: PWMxH Output Pin Ownership bit
1 = PWM module controls PWMxH pin
0 = GPIO module controls PWMxH pin
bit 14 PENL: PWMxL Output Pin Ownership bit
1 = PWM module controls PWMxL pin
0 = GPIO module controls PWMxL pin
bit 13 POLH: PWMxH Output Pin Polarity bit
1 = PWMxH pin is active-low
0 = PWMxH pin is active-high
bit 12 POLL: PWMxL Output Pin Polarity bit
1 = PWMxL pin is active-low
0 = PWMxL pin is active-high
bit 11-10 PMOD<1:0>: PWMx I/O Pin Mode bits
(1)
11 = PWM I/O pin pair is in the True Independent Output mode
10 = PWM I/O pin pair is in the Push-Pull Output mode
01 = PWM I/O pin pair is in the Redundant Output mode
00 = PWM I/O pin pair is in the Complementary Output mode
bit 9 OVRENH: Override Enable for PWMxH Pin bit
1 = OVRDAT<1> provides data for output on PWMxH pin
0 = PWM generator provides data for PWMxH pin
bit 8 OVRENL: Override Enable for PWMxL Pin bit
1 = OVRDAT<0> provides data for output on PWMxL pin
0 = PWM generator provides data for PWMxL pin
bit 7-6 OVRDAT<1:0>: Data for PWMxH and PWMxL Pins if Override is Enabled bits
If OVERENH = 1 then OVRDAT<1> provides data for PWMxH.
If OVERENL = 1 then OVRDAT<0> provides data for PWMxL.
bit 5-4 FLTDAT<1:0>: State for PWMxH and PWMxL Pins if FLTMOD is Enabled bits
(2)
IFLTMOD (FCLCONx<15>) = 0, Normal Fault mode:
If Fault is active, then FLTDAT<1> provides the state for PWMxH.
If Fault is active, then FLTDAT<0> provides the state for PWMxL.
IFLTMOD (
FCLCONx<15>) = 1, Independent Fault mode:
If current-limit is active, then FLTDAT<1> provides the state for PWMxH.
If Fault is active, then FLTDAT<0> provides the state for PWMxL.
Note 1: These bits should be changed only when PTEN = 0. Changing the clock selection during operation will
yield unpredictable results.
2: State represents the active/inactive state of the PWM module depending on the POLH and POLL bit
settings.