Datasheet

 2011-2012 Microchip Technology Inc. DS75018C-page 177
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
13.0 INPUT CAPTURE
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the IC1 pin. The events that cause a capture event
are listed below in three categories:
• Simple Capture Event modes:
- Capture timer value on every falling edge of
input at IC1 pin
- Capture timer value on every rising edge of
input at IC1 pin
• Capture timer value on every edge (rising
and falling)
• Prescaler Capture Event modes:
- Capture timer value on every 4th rising edge
of input at IC1 pin
- Capture timer value on every 16th rising
edge of input at IC1 pin
The input capture module uses the Timer2 module
as its timer; however, it can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
Sleep and Idle modes
• Interrupt on input capture event
• 4-word FIFO buffer for capture values:
- Interrupt optionally generated after 1, 2, 3 or
4 buffer locations are filled
• Use of input capture to provide additional sources
of external interrupts
FIGURE 13-1: INPUT CAPTURE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33FJ06GS001/101A/102A/
202A and dsPIC33FJ09GS302 families
of devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 12. “Input Cap-
ture” (DS70198) in the “dsPIC33F/
PIC24H Family Reference Manual”,
which is available on the Microchip web
site (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
IC1BUF
IC1 Pin
ICM<2:0> (IC1CON<2:0>)
Mode Select
3
Set Flag IC1IF
(in IFS0 Register)
TMR2
Edge Detection Logic
16
FIFO
R/W
Logic
ICI<1:0>
ICOV, ICBNE (IC1CON<4:3>)
IC1CON
Interrupt
Logic
System Bus
FIFO
Prescaler
Counter
(1, 4, 16)
and
Clock Synchronizer