Datasheet

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
DS75018C-page 160 2011-2012 Microchip Technology Inc.
REGISTER 10-8: RPINR20: PERIPHERAL PIN SELECT INPUT REGISTER 20
U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
—SCK1R<5:0>
(1)
bit 15 bit 8
U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
—SDI1R<5:0>
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0
bit 13-8 SCK1R<5:0>: Assign SPI1 Clock Input (SCK1) to the Corresponding RPn Pin bits
(1)
111111 = Input tied to VSS
100011 = Input tied to RP35
100010 = Input tied to RP34
100001 = Input tied to RP33
100000 = Input tied to RP32
00000 = Input tied to RP0
bit 7-6 Unimplemented: Read as ‘0
bit 5-0 SDI1R<5:0>: Assign SPI1 Data Input (SDI1) to the Corresponding RPn Pin bits
(1)
111111 = Input tied to VSS
100011 = Input tied to RP35
100010 = Input tied to RP34
100001 = Input tied to RP33
100000 = Input tied to RP32
00000 = Input tied to RP0
Note 1: These bits are not implemented in the dsPIC33FJ06GS001 device.