Datasheet
2011-2012 Microchip Technology Inc. DS75018C-page 15
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Type
Buffer
Type
PPS
Capable
Description
AN0-AN7 I Analog No Analog input channels.
CLKI
CLKO
I
O
ST/CMOS
—
No
No
External clock source input. Always associated with OSC1 pin
function.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC
modes. Always associated with OSC2 pin function.
OSC1
OSC2
I
I/O
ST/CMOS
—
No
No
Oscillator crystal input. ST buffer when configured in RC mode;
CMOS otherwise.
Oscillator crystal output. Connects to crystal or resonator in Crystal
Oscillator mode. Optionally functions as CLKO in RC and EC
modes.
CN0-CN15 I ST No Change notification inputs. Can be software programmed for
internal weak pull-ups on all inputs.
IC1 I ST Yes Capture Input 1.
OCFA
OC1
I
O
ST
—
Yes
Yes
Compare Fault A input (for Compare Channel 1).
Compare Output 1.
INT0
INT1
INT2
I
I
I
ST
ST
ST
No
Yes
Yes
External Interrupt 0.
External Interrupt 1.
External Interrupt 2.
RA0-RA4 I/O ST No PORTA is a bidirectional I/O port.
RB0-RB15
(1)
I/O ST No PORTB is a bidirectional I/O port.
RP0-RP15
(1)
I/O ST No Remappable I/O pins.
T1CK
T2CK
I
I
ST
ST
Yes
Yes
Timer1 external clock input.
Timer2 external clock input.
U1CTS
U1RTS
U1RX
U1TX
I
O
I
O
ST
—
ST
—
Yes
Yes
Yes
Yes
UART1 Clear-to-Send.
UART1 Ready-to-Send.
UART1 receive.
UART1 transmit.
SCK1
SDI1
SDO1
SS1
I/O
I
O
I/O
ST
ST
—
ST
Yes
Yes
Yes
Yes
Synchronous serial clock input/output for SPI1.
SPI1 data in.
SPI1 data out.
SPI1 slave synchronization or frame pulse I/O.
SCL1
SDA1
I/O
I/O
ST
ST
No
No
Synchronous serial clock input/output for I2C1.
Synchronous serial data input/output for I2C1.
TMS
TCK
TDI
TDO
I
I
I
O
TTL
TTL
TTL
—
No
No
No
No
JTAG Test mode select pin.
JTAG test clock input pin.
JTAG test data input pin.
JTAG test data output pin.
Legend: CMOS = CMOS compatible input or output Analog = Analog input I = Input
ST = Schmitt Trigger input with CMOS levels P = Power O = Output
TTL = Transistor-Transistor Logic PPS = Peripheral Pin Select — = Does not apply
Note 1: Not all pins are available on all devices. Refer to the specific device in the “Pin Diagrams” section for
availability.
2: This pin is available on dsPIC33FJ09GS302 devices only.