Datasheet

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 DS70318F-page 56 © 2008-2012 Microchip Technology Inc.
TABLE 4-11: TIMER REGISTER MAP FOR dsPIC33FJ06GS101 AND dsPIC33FJ06GSX02
TABLE 4-12: TIMER REGISTER MAP FOR dsPIC33FJ16GSX02 AND dsPIC33FJ16GSX04
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1
0102
Period Register 1 FFFF
T1CON
0104
TON
—TSIDL— — — — — — TGATE TCKPS<1:0> — TSYNC TCS — 0000
TMR2
0106
Timer2 Register 0000
PR2
010C
Period Register 2 FFFF
T2CON
0110
TON
—TSIDL— — — — — — TGATE TCKPS<1:0> — —TCS— 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
TMR1 0100 Timer1 Register 0000
PR1
0102
Period Register 1 FFFF
T1CON
0104
TON
—TSIDL— — — — — — TGATE TCKPS<1:0> — TSYNC TCS — 0000
TMR2
0106
Timer2 Register 0000
TMR3HLD
0108
Timer3 Holding Register (for 32-bit timer operations only) xxxx
TMR3
010A
Timer3 Register 0000
PR2
010C
Period Register 2 FFFF
PR3
010E
Period Register 3 FFFF
T2CON
0110
TON
—TSIDL— — — — — — TGATE TCKPS<1:0> T32 —TCS— 0000
T3CON
0112
TON
—TSIDL— — — — — — TGATE TCKPS<1:0> — —TCS— 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-13: INPUT CAPTURE REGISTER MAP FOR dsPIC33FJ06GS202
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
IC1BUF 0140 Input Capture 1 Register xxxx
IC1CON 0142
— —ICSIDL — — — — — ICTMR ICI<1:0> ICOV ICBNE ICM<2:0> 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.