Datasheet

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70318F-page 326 © 2008-2012 Microchip Technology Inc.
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TABLE 24-40: 10-BIT HIGH-SPEED ADC MODULE SPECIFICATIONS
AC CHARACTERISTICS
Standard Operating Conditions (see Note2): 3.0V and 3.6V
(unless otherwise stated)
Operating temperature -40°C T
A +85°C for Industrial
-40°C TA +125°C for Extended
Param
No.
Symbol Characteristic Min. Typ. Max. Units Conditions
Device Supply
AD01 AVDD Module VDD Supply AVDD is internally con-
nected to VDD. See parame-
ter (DC10) in Table 24-4
AD02 AV
SS Module VSS Supply AVSS is internally connected
to V
SS
Analog Input
AD10 V
INH-VINL Full-Scale Input Span VSS —VDD V—
AD11 V
IN Absolute Input Voltage AVSS —AVDD V—
AD12 IAD Operating Current 8 mA
AD13 Leakage Current ±0.6 μAV
INL = AVSS = 0V, AVDD = 3.3V
Source Impedance = 100Ω
AD17 R
IN Recommended Impedance
Of Analog Voltage Source
100 Ω
DC Accuracy @ 1.5 MSPS
AD20A Nr Resolution 10 data bits
AD21A INL Integral Nonlinearity -0.5 -0.3/+0.5 +1.2 LSb
AD22A DNL Differential Nonlinearity -0.9 ±0.6 +0.9 LSb
AD23A G
ERR Gain Error 13 15 22 LSb
AD24A E
OFF Offset Error 6 7 8 LSb
AD25A Monotonicity
(1)
Guaranteed
DC Accuracy @ 1.7 MSPS
AD20B Nr Resolution 10 data bits
AD21B INL Integral Nonlinearity -0.5 -0.4/+1.1 +1.8 LSb
AD22B DNL Differential Nonlinearity -1.0 ±1.0 +1.5 LSb
AD23B G
ERR Gain Error 13 15 22 LSb
AD24B EOFF Offset Error 6 7 8 LSb
AD25B Monotonicity
(1)
Guaranteed
DC Accuracy @ 2.0 MSPS
AD20C Nr Resolution 10 data bits
AD21C INL Integral Nonlinearity -0.8 -0.5/+1.8 +2.8 LSb
AD22C DNL Differential Nonlinearity -1.0 -1.0/+1.8 +2.8 LSb
AD23C G
ERR Gain Error 14 16 23 LSb
AD24C E
OFF Offset Error 6 7 8 LSb
AD25C Monotonicity
(1)
Guaranteed
Dynamic Performance
AD30 THD Total Harmonic Distortion -73 dB
AD31 SINAD Signal to Noise and Distortion 58 dB
AD32 SFDR Spurious Free Dynamic Range -73 dB
AD33 F
NYQ Input Signal Bandwidth 1 MHz
AD34 ENOB Effective Number of Bits 9.4 bits
Note 1: The analog-to-digital conversion result never decreases with an increase in input voltage, and has no
missing codes.
2: Module is functional at V
BOR < VDD < VDDMIN, but with degraded performance. Module functionality is
tested but not characterized.