Datasheet

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04

FIGURE 19-3: ADC BLOCK DIAGRAM FOR dsPIC33FJ06GS202 DEVICES WITH ONE SAR

AN12

(1)

AN13

(2)

Even Numbered Inputs with Dedicated

Shared Sample and Hold

Data

Format

SAR

Core

Eight

Registers

16-bit

Sample and Hold (S&H) Circuits

Bus Interface

AN0

AN2

AN1

AN4

AN5

AN3

(INTREF)

(EXTREF)

Note 1: AN12 (EXTREF) is an internal analog input. To measure the voltage at AN12 (EXTREF), an analog comparator must be enabled

and EXTREF must be selected as the comparator reference.

2: AN13 (INTREF) is an internal analog input and is not available on a pin.