Datasheet
© 2008-2012 Microchip Technology Inc. DS70318F-page 225
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
17.2 I
2
C Registers
I2CxCON and I2CxSTAT are control and status
registers. The I2CxCON register is readable and
writable. The lower six bits of I2CxSTAT are read-only.
The remaining bits of the I2CxSTAT are read/write:
• I2CxRSR is the shift register used for shifting data
internal to the module and the user application
has no access to it
• I2CxRCV is the receive buffer and the register to
which data bytes are written, or from which data
bytes are read
• I2CxTRN is the transmit register to which bytes
are written during a transmit operation
• The I2CxADD register holds the slave address
• A status bit, ADD10, indicates 10-bit Address
mode
• The I2CxBRG acts as the Baud Rate Generator
(BRG) reload value
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV,
and an interrupt pulse is generated.