Datasheet

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70318F-page 224 © 2008-2012 Microchip Technology Inc.
FIGURE 17-1: I
2
C™ BLOCK DIAGRAM (X = 1)
Internal
Data Bus
SCLx
SDAx
Shift
Match Detect
I2CxADD
Start and Stop
Bit Detect
Clock
Address Match
Clock
Stretching
I2CxTRN
LSb
Shift
Clock
BRG Down Counter
Reload
Control
TCY/2
Start and Stop
Bit Generation
Acknowledge
Generation
Collision
Detect
I2CxCON
I2CxSTAT
Control Logic
Read
LSb
Write
Read
I2CxBRG
I2CxRSR
Write
Read
Write
Read
Write
Read
Write
Read
Write
Read
I2CxMSK
I2CxRCV