Specifications

© 2006 Microchip Technology Inc. DS70183A-page 16-47
Section 16. Analog-to-Digital Converter (ADC)
A
D
C
16
16.14.6 Sampling Eight Inputs Using Sequential Sampling
Figure 16-22 and Table 16-7 demonstrate sequential sampling. When converting more than one
channel and selecting sequential sampling, the ADC module starts sampling a channel at the
earliest opportunity, then performs the required conversions in sequence. In this example, with
ASAM set, sampling of a channel begins after the conversion of that channel completes.
When ASAM is clear, sampling does not resume after conversion completion but occurs when
the SAMP bit is set.
When utilizing more than one channel, sequential sampling provides more sampling time since
a channel can be sampled while conversion occurs on another.
Figure 16-22: Sampling Eight Inputs Using Sequential Sampling
ADC Clock
SAMP
DONE
Input to CH0
AN13-AN1
TSAMP
AD1IF
AN0
AN1
AN2
Input to CH1
Input to CH2
Input to CH3
Buffer[13]
Buffer[14]
Buffer[15]
AN14
TSAMP
AN4-AN7
AN5-AN8
AN14
TSAMP
AN3-AN6
AN4-AN7
AN5-AN8
ASAM
AN1
AN2
Buffer[0]
Buffer[1]
Buffer[2]
Buffer[3]
Buffer[12]
AN13-AN1
AN0
AN2
Conversion
Trigger
T
CONVTCONVTCONVTCONV TCONVTCONVTCONVTCONV TCONVTCONVTCONVTCONV
AN3-AN6
AN1
AN13-AN1
AN0