Specifications

dsPIC33F Family Reference Manual
DS70183A-page 16-20 © 2006 Microchip Technology Inc.
16.7.3.1 SELECTING MULTIPLE CHANNELS FOR A SINGLE ANALOG INPUT
The analog input multiplexer can be configured so that the same input pin is connected to two or
more Sample/Hold channels. The ADC converts the value held on one Sample/Hold channel,
while the second Sample/Hold channel acquires a new input sample.
16.7.3.2 SPECIFYING ALTERNATING CHANNEL 1, 2 AND 3 INPUT
SELECTIONS
As with the channel 0 inputs, the ALTS bit (ADxCON2<0>) causes the ADC module to alternate
between two sets of inputs that are selected during successive samples for channel 1,2 and 3.
The MUX A inputs specified by CH123SA and CH123NA<1:0> always select the input when
ALTS = 0.
The MUX A inputs alternate with the MUX B inputs specified by CH123SB and CH123NB<1:0>
when ALTS = 1.
16.8 ENABLING THE MODULE
When the ADC Operating Mode (ADON) bit (ADxCON1<15>) is ‘1’, the ADC module is in Active
mode and is fully powered and functional.
When ADON is ‘0’, the ADC module is disabled. The digital and analog portions of the circuit are
turned off for maximum current savings.
In order to return to the Active mode from the Off mode, the user must wait for the analog stages
to stabilize. For the stabilization time, refer to the Electrical Characteristics section of the device
data sheet.
16.9 SPECIFYING SAMPLE/CONVERSION CONTROL
The ADC module uses four Sample/Hold amplifiers and one A/D Converter in the 10-bit mode.
The module can perform 1, 2 or 4 input samples and A/D conversions per sample/convert
sequence.
16.9.1 Number of Sample/Hold Channels
The CHPS<1:0> control bits (ADxCON2<9:8>) are used to select how many Sample/Hold ampli-
fiers are used by the ADC module during sample/conversion sequences. The following three
options can be selected:
• CH0 only
• CH0 and CH1
• CH0, CH1, CH2, CH3
The CHPS control bits work in conjunction with the SIMSAM (simultaneous sample) control bit
(ADxCON1<3>). The CHPS and SIMSAM bits are not relevant in 12-bit mode as there is only
one Sample/Hold amplifier.
16.9.2 Simultaneous Sampling Enable
Some applications can require that multiple signals be sampled simultaneously. The SIMSAM
control bit (ADxCON1<3>) works in conjunction with the CHPS control bits and controls the sam-
ple/convert sequence for multiple channels as shown in Table 16-1. The SIMSAM control bit has
no effect on the ADC module operation if CHPS<1:0> = 00. If more than one Sample/Hold ampli-
fier is enabled by the CHPS control bits and the SIMSAM bit is ‘0’, the two or four selected chan-
nels are sampled and converted sequentially with two or four sampling periods. If the SIMSAM
bit is ‘1’, two or four selected channels are sampled simultaneously with one sampling period.
The channels are then converted sequentially. The SIMSAM bit is not relevant in 12-bit mode as
there is only one S/H.
Note: The SSRC<2:0>, SIMSAM, ASAM, CHPS<1:0>, SMPI<3:0>, BUFM and ALTS bits,
as well as the ADxCON3, ADxCSSH and ADxCSSL registers, should not be written
to while ADON = 1. This would lead to indeterminate results.