Specifications
© 2008-2012 Microchip Technology Inc. DS70323E-page 43-79
Section 43. High-Speed PWM
High-Speed PWM
43
Table 43-6: Selectable Input Sources (Maps Input to Function) for Devices with
Remappable I/O
Table 43-7: Output Selection for Remappable Pin (RPn) for Devices with Remappable
I/O
43.10.7.2 CONFIGURING ANALOG COMPARATOR IN CYCLE-BY-CYCLE MODE
The built-in High-Speed Analog Comparator can be configured to set the Cycle-by-Cycle mode.
The typical configuration of Analog Comparator in Cycle-by-Cycle mode is illustrated in
Figure 43-38.
Figure 43-38: Digital Peak Current Mode Boost Converter
Input Name Function Name Register Configuration Bits
PWM Fault Input 1 FLT1 RPINR29 FLT1R<5:0>
PWM Fault Input 2 FLT2 RPINR30 FLT2R<5:0>
PWM Fault Input 3 FLT3 RPINR30 FLT3R<5:0>
PWM Fault Input 4 FLT4 RPINR31 FLT4R<5:0>
PWM Fault Input 5 FLT5 RPINR31 FLT5R<5:0>
PWM Fault Input 6 FLT6 RPINR32 FLT6R<5:0>
PWM Fault Input 7 FLT7 RPINR32 FLT7R<5:0>
PWM Fault Input 8 FLT8 RPINR33 FLT8R<5:0>
Function RPORn<5:0> Output Name
ACMP1 100111
RPn tied to Analog Comparator Output 1
ACMP2 101000
RPn tied to Analog Comparator Output 2
ACMP3 101001
RPn tied to Analog Comparator Output 3
ACMP4 101010
RPn tied to Analog Comparator Output 4
EXTREF
Fault Source
CMREF
Targeted Voltage
PI
ADC
High-Speed PWM
Virtual I/O
(1)
DAC
MUX
Comp
INTREF
Control
AV
DD
/2
D
V
Boost
L
I
S
PWMxH/
R
S
R
R
V
IN
+
V
IN
-
Slope Compensation
dsPIC33FJXXGSXXX
Note 1: Applicable only to devices with re-mappable I/O.
PWMxL