Specifications

dsPIC33F/PIC24H Family Reference Manual

43.10.7 PWM Current-Limit Pins

The key functions of the PWM current-limit pins are as follows:

• For devices with re-mappable I/Os each PWM generator can select its current-limit input

source from up to eight Fault sources (the input to each of the fault sources can be

assigned as any of the re-mappable pins or the outputs of analog comparators using the

virtual pins). To configure the analog comparator as one of the current-limit sources, refer

to 43.10.1 “PWM Fault Generated by the Analog Comparator”.

• For devices without re-mappable I/Os each PWM generator can select its current-limit input

source from up to 23 Fault pins and up to four analog comparator outputs.

• Each PWM generator has Current-Limit Control Signal Source Select bits CLSRC<4:0>

(FCLCONx<14:10>). These bits specify the source for its current-limit signal.

• Each PWM generator has a corresponding Current-Limit Interrupt Enable bit,

CLIEN (PWMCONx<11>). This bit enables the generation of current-limit IRQs.

• Each PWM generator has an associated Current-Limit Polarity bit, CLPOL (FCLCONx<9>).

• Upon occurrence of current-limit condition, outputs of the PWMxH and PWMxL generator

change to one of the following states:

- If the Independent Fault Enable bit, IFLTMOD (FCLCONx<15>) is set, the

CLDAT<1:0> bits (IOCONx<3:2>) are not used for override functions.

- If the IFLTMOD bit (FCLCONx<15>) is clear, and the CLMOD bit (FCLCONx<8>) is

set, enabling the current-limit function, then the CLDAT<1:0> bits (High/Low)

(IOCONx<3:2>) supply the data values to be assigned to the PWMxH and PWMxL

outputs when a current limit is active.

The major functions of the current-limit pin are as follows:

• A current-limit can override the PWM outputs. The CLDAT<1:0> bits (IOCONx<3:2>) can

have a value of either ‘0’ or ‘1’. If CLDAT is set to ‘0’, it is processed asynchronously to

enable immediate shutdown of the associated power transistors in the application circuit. If

CLDAT is set to ‘1’, it is processed by the dead time logic and then applied to the PWM

outputs.

• The current-limit signals can generate interrupts. The CLIEN bit (PWMCONx<11>) controls

the current-limit interrupt signal generation. The user-assigned application can specify

interrupt generation even if the CLMOD bit (FCLCONx<8>) disables the current-limit

override function. This allows the current-limit input signal to be used as a general purpose

external IRQ signal.

• The current-limit input signal that can be used as a trigger signal to the ADC, which initiates

an ADC conversion process. The ADC trigger signals are always active regardless of the

state of the High-Speed PWM module, the FLTMOD<1:0> bits (FCLCONx<1:0>), or the

FLTIEN bit (PWMCONx<12>).