Specifications
© 2008-2012 Microchip Technology Inc. DS70323E-page 43-47
Section 43. High-Speed PWM
High-Speed PWM
43
43.6.2 PWM Duty Cycle Control
The duty cycle determines the period of time that the PWM output must remain in the active state.
Each duty cycle register allows a 16-bit duty cycle value that is to be specified. The duty cycle
values can be updated any time by setting the Immediate Update Enable bit,
IUE (PWMCONx<0>). If the IUE bit (PWMCONx<0>) is ‘0’, the active Duty Cycle register (PDCx,
SDCx or MDC) updates at the start of the next PWM cycle.
The Master Duty Cycle register (MDC) enables multiple PWM generators to share a common
duty cycle register. The MDC register has an important role in Master Time Base mode.
In addition, each PWM generator has a Primary Duty Cycle register (PDCx) and a Secondary
Duty Cycle register (SDCx) that provides separate duty cycles to each PWM.
43.6.2.1 MASTER DUTY CYCLE (MDC)
The MDC register can be used to provide the same duty cycle to multiple PWM generators. The
MDC register can be used in any PWM mode, and also Master or Independent Time Base. The
Master Duty Cycle Register Select bit, MDCS (PWMCONx<8>), determines whether the duty
cycle of each of the PWMxH and PWMxL outputs are controlled by the PWM MDC register or the
PDCx and SDCx registers.
The MDC register enables sharing of the common duty cycle register among multiple PWM
generators and saves the CPU overhead required in updating multiple duty cycle registers.
43.6.2.2 PRIMARY DUTY CYCLE (PDCx)
The PDCx register can be used for generating the duty cycle for an individual PWM generator.
In the Complementary, Redundant or Push-Pull modes, the PDCx register provides the duty
cycle for both PWMxH and PWMxL outputs. In Independent Output mode, the PDCx register only
provides the duty cycle for the PWMxH output. The primary duty cycle comparison is illustrated
in Figure 43-12.
Figure 43-12: Primary Duty Cycle Comparison
43.6.2.3 SECONDARY DUTY CYCLE (SDCx)
The SDCx register is only used in Independent Output mode. It is ignored in Complementary,
Redundant and Push-Pull modes. In Independent Output mode, the SDCx register is an input
register that provides the duty cycle value for the secondary PWM output (PWMxL) signal. The
secondary duty cycle comparison is illustrated in Figure 43-13.
PDCx Register
PMTMR or PTMRx
Compare Logic
PWMxH and/or PWMxL signal
0
15
15
MUX
MDC Register
MDCS select
01
CLK
15
0
0
<=
Note: In Independent Output mode, PDCx affects PWMxH only.