Specifications

dsPIC33F/PIC24H Family Reference Manual
DS70323E-page 43-36 © 2008-2012 Microchip Technology Inc.
For devices with remappable I/O, refer to Section 42. “Oscillator (Part IV)” (DS70307), for
more information on configuring the clock generator. For devices without remappable I/O, refer
to Section 48. “Oscillator (Part V)” (DS70596).
Equation 43-1: ACLK Frequency Calculation
Example 43-1: Using FRC for Setting the ACLK
Example 43-2: Using P
OSC for Setting the ACLK
ACLK
REFCLK M1×
N
--------------------------------------=
Where,
REFCLK = Internal FRC Clock frequency (7.37 MHz), if the Internal FRC is selected as the
clock source
(or)
REFCLK = Primary Oscillator Clock frequency (POSCCLK), if the Primary Oscillator (P
OSC)
is selected as the clock source
M1 = 16, if the auxiliary PLL is enabled by setting the ENAPLL bit (ACLKCON<15>)
(or)
M1 = 1, if the auxiliary PLL is disabled
N = Postscaler ratio selected by the Auxiliary Postscaler bits (APSTSCLR<2:0>) in the
Auxiliary Clock Control register (ACLKCON<2:0>)
Note 1: The nominal input clock to the PWM should be 120 MHz. Refer to the “Electrical
Characteristics” chapter in the specific device data sheet for the full operating
range.
2: Use the TUN<5:0> bits of OSCTUN register to tune the FRC clock frequency to
7.49 MHz to obtain a maximum PWM resolution of 1.04 ns. Refer to the “Oscillator
Configuration” section of the device data sheet for more information.
3: The auxiliary clock post scaler must be configured to
Divide-by-1 (APSTSCLR<2:0>) = 111), for proper operation of the PWM module.
/* Setup for the Auxiliary clock to use the FRC as the REFCLK */
/* ((FRC * 16) / APSTSCLR) = (7.49 * 16) / 1 = 119.84 MHz */
ACLKCONbits.FRCSEL = 1; /* FRC is input to Auxiliary PLL */
ACLKCONbits.SELACLK = 1; /* Auxiliary Oscillator provides the clock
source */
ACLKCONbits.APSTSCLR = 7; /* Divide Auxiliary clock by 1 */
ACLKCONbits.ENAPLL = 1; /* Enable Auxiliary PLL */
while(ACLKCONbits.APLLCK != 1); /* Wait for Auxiliary PLL to Lock */
/* Setup for the Auxiliary clock to use the primary oscillator(7.37 MHz) as
the REFCLK */
/*((primary oscillator* 16) / APSTSCLR) = (7.37 * 16) / 1 = 117.9 MHz */
/* Primary Oscillator is the Clock Source */
ACLKCONbits.ARCSEL = 1;
/* Input clock source is determined by ASRCSEL bit setting */
ACLKCONbits.FRCSEL = 0;
/* Auxiliary Oscillator provides the clock source */
ACLKCONbits.SELACLK = 1;
/* Divide Auxiliary clock by 1 */
ACLKCONbits.APSTSCLR = 7;
/* Enable Auxiliary PLL */
ACLKCONbits.ENAPLL = 1;
/* Wait for Auxiliary PLL to Lock */
while(ACLKCONbits.APLLCK != 1);