Specifications

dsPIC33F/PIC24H Family Reference Manual
DS70323E-page 43-114 © 2008-2012 Microchip Technology Inc.
Revision D (March 2011)
This revision includes the following updates:
• Updated the definitions for the PTCON2, PHASEx, and SPHASEx registers in
43.3 “Control Registers”
• Added Note 2 and Note 3 to the PTCON register (Register 43-1)
• Added Note 2 and Note 3 to the shaded note below the SEVTCMP register (Register 43-4)
• Removed Note 1 from the STCON register (Register 43-5)
• Added Notes 1, 2, and 3 to the SSEVTCMP register (Register 43-8)
• Added a new Note 2 to the shaded note below the MDC register (Register 43-10)
• Updated Note 1 and added a new Note 3 to the shaded note below the PDCx register
(Register 43-12)
• Updated Note 1 and added a new Note 3 to the shaded note below the SDCx register
(Register 43-13)
• Updated Note 1 and Note 2 in the shaded note below the PHASEx register
(Register 43-15)
• Added a reference to Note 2 to the CLDAT<1:0> bits in the IOCONx register
(Register 43-19)
• Updated Note 1 and updated the bit definition for the LEB<6:0> bits in the LEBCONx
register (Register 43-23)
• Updated Note 4 in the shaded note in the PWMCAPx register (Register 43-27)
• Updated the first sentence of the fourth paragraph in 43.4 “Architecture Overview”
• Updated the High-Speed PWM Module Architectural Overview diagram (see Figure 43-1)
• Added 120 MHz max to the F
VCO reference in the Auxiliary Clock Generation block of the
oscillator system diagram (see Figure 43-3)
• Updated the code in Using F
VCO as the Auxiliary Clock Source (see Example 43-3)
• Updated prescaler option selections in 43.5.2 “Time Base”
• Updated the comments and added a line for enabling the independent time base in
Edge-Aligned or Center-Aligned Mode Selection (see Example 43-4)
• Updated 43.5.7 “Special Event Trigger”
• Updated the code in ADC Special Event Trigger Configuration (see Example 43-7)
• Updated 43.5.8 “Independent PWM Time Base”
• Updated the second, fourth, and sixth paragraphs and the first bulleted item in
43.6.1 “PWM Period”
• Updated the second comment in Clock Prescaler Selection (see Example 43-9)
• Added comments to the three lines of code in PWM Time Period Initialization (see
Example 43-11)
• Updated the first paragraph in 43.6.2 “PWM Duty Cycle Control”
• Updated the first paragraph in 43.6.2.1 “Master Duty Cycle (MDC)”
• Updated the first paragraph in 43.6.2.2 “Primary Duty Cycle (PDCx)”
• Changed the PWMx signal reference in Primary Duty Cycle Comparison to PWMxH and/or
PWMxL (see Figure 43-12)
• Updated the first paragraph in 43.6.2.3 “Secondary Duty Cycle (SDCx)”
• Changed the PWMx signal reference in Secondary Duty Cycle Comparison to PWMxL and
updated the note (see Figure 43-13)
• Updated the first sentence of the first paragraph in 43.6.2.4 “Duty Cycle Resolution”
• Updated the PWM Trigger for Analog-to-Digital Conversion by adding a zero value input to
the DTM multiplexer (see Figure 43-19)
• Added the new section 43.18 “PWM Interconnects with Other Peripherals (ADC,
Analog Comparator and Interrupt Controller)”