Specifications

© 2008-2012 Microchip Technology Inc. DS70323E-page 43-113
Section 43. High-Speed PWM
High-Speed PWM
43
Revision C (March 2010) (Continued)
- Updated the following changes in 43.10.4 “Fault Exit”:
Removed the following description: The next PWM cycle begins when the PTMR value
is zero
Updated step “c)”
- Corrected the term “FSTAT” as “FLTSTAT” in 43.10.5 “Fault Exit with PMTMR
Disabled”
- Updated the following changes in 43.10.7 “PWM Current-Limit Pins”:
Replaced the description “This behavior is called Current Reset mode, which is
used in some Power Factor Correction applications” as “Refer
to 43.16.5 “Current Reset PWM” for more details”
Added 43.10.7.2 “Configuring Analog Comparator in Cycle-by-Cycle Mode”.
- Updated the following changes in 43.11.1 “Leading-Edge Blanking (LEB)”:
Updated “8.4 ns” as “8.32 ns”
Added the following description: In High-Speed Switching applications, switches (such
as MOSFETs/IGBTs) typically generate very large transients. These transients can
cause problematic measurement errors. The LEB function enables the user-assigned
application to ignore the expected transients caused by the transistor switching that
occurs near the edges of the PWM output signals.
- Corrected the term “current mode control” as “current-limit PWM control”
in 43.11.2 “Individual Time Base Capture”
- Updated the following changes in 43.12.4 “Fault/Current-Limit Override and Dead
Time Logic”:
Corrected the following terms in the description: “low” is updated as “inactive” and
“impact” is updated as “aid”
Added the terms “are driven active” in the description
- Added 43.12.6 “PENx (GPIO/PWM) Ownership”
- Updated the following changes in 43.15 “External Control of Individual Time
Base(s) (Current Reset Mode)”:
Updated the title “External Control of Individual Time Base(s)” as “External
Control of Individual Time Base(s) (Current Reset Mode)”
Added “Hysteresis and Critical Conduction mode in the description
- Re-arranged the second paragraph in 43.16.3 “Multi-Phase PWM” as new sub
section 43.16.3.1 “Multi-Phase Buck Regulator”
- Added 43.16.3.2 “Interleaved Power Factor Correction (IPFC)”
- Added the advantages of Current Reset mode in PFC applications,
in 43.16.5 “Current Reset PWM”
- Added 43.17 “Burst Mode Implementation”
Tables:
- Updated the following tables: Table 43-3 and Table 43-4
- Added the following tables: Table 43-5 through Table 43-7
Specific references to “dsPIC33F” are updated as “dsPIC33F/PIC24H” in this Family
Reference Manual
Renamed the Family Reference Manual name “dsPIC33F Section 43. High-Speed
PWM” as “dsPIC33F/PIC24H Section 43. High-Speed PWM”
Changes to text and formatting were incorporated throughout the document