Specifications

© 2008-2012 Microchip Technology Inc. DS70323E-page 43-101
Section 43. High-Speed PWM
High-Speed PWM
43
43.16.6 Constant Off-Time PWM
Constant Off-Time PWM illustrated in Figure 43-53, is a variable-frequency PWM output where
the actual PWM period is less than or equal to the specified period value. The PWM time base
resets externally after the PWM signal duty cycle value is reached and the PWM signal is
deasserted. This is implemented by enabling the On-Time PWM output called Current Reset
PWM and using the complementary PWM output (PWMxL).
The Constant Off-Time PWM can be enabled only when the PWM generator operates in
independent time base. If an external Reset signal is not received, by default, the PWM period
uses the value specified in PHASEx register.
Figure 43-53: Constant Off-Time PWM
43.16.7 Current-Limit PWM
The cycle-by-cycle current-limit, illustrated in Figure 43-54, truncates the asserted PWM signal
when the selected external fault signal is asserted. The PWM output values are specified by the
CLDAT<1:0> bits (IOCONx<3:2>). The override outputs remain in effect until the beginning of
the next PWM cycle. This is sometimes used in PFC circuits where the inductor current controls
the PWM On-Time. This is a constant frequency PWM.
Duty Cycle
0
Period
Timer
Value
Programmed Period
PWMxH/L
Value
External Timer Reset
Duty Cycle
Actual Period
External Reset
Note: Duty Cycle represents OFF-Time.