Information

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS80526C-page 12 © 2011-2012 Microchip Technology Inc.
27. Module: QEI
When Modulo Count mode (Mode 6) is selected for
the position counter (QEIxCON<PIMOD> = 110)
and the counter direction is set to negative
(QEIxCON<CNTPOL> = 1), the functions of the
QEIxLEC and QEIxGEC registers are reversed.
Work around
When using Modulo Count mode in conjunction
with a negative count direction (polarity) use the
QEIxLEC register as the upper count limit and the
QEIxGEC register as the lower count limit.
Affected Silicon Revisions
28. Module: CPU
Table write (TBLWTL, TBLWTH) instructions cannot
be the first or last instruction of a DO loop.
Work around
None.
Affected Silicon Revisions
29. Module: PWM
The PWM module can operate with variable
period, duty cycle, dead-time, and phase values.
The master period and other timing parameters
can be updated in the same PWM cycle. With
immediate updates disabled, the new values
should take effect at the start of the next PWM
cycle.
As a result of this issue, the updated master period
takes effect on the next PWM cycle, while the
update of the additional timing parameter is
delayed by one PWM cycle. The parameters
affected by this erratum are as follows:
Master period registers – update effective on the
next PWM cycle:
• PTPER – if PWMCONx<MTBS> = 0
• STPER – if PWMCONx<MTBS> = 1
Additional PWM timing parameters – update
effective one PWM cycle after master period
update:
• Duty cycle – PDCx, SDCx, and MDC registers
• Phase – PHASEx or SPHASEx registers
• Dead-time – DTRx and ALTDTRx registers
and dead-time compensation signals
• Clearing of current-limit and Fault conditions,
and application of external period reset signal
Work around
If the application requires the master period and
other parameters to be updated at the same time,
enable both immediate updates:
• PTCON<EIPU> = 1 – to enable immediate
period updates
• PWMCONx<IUE> = 1 – to enable immediate
updates of additional parameters listed above
Enabling immediate updates will allow updates to
the master period and the other parameters to take
effect immediately after writing to the respective
registers.
Affected Silicon Revisions
B1
X
Note: This silicon issue applies only to
dsPIC33EPXXXGP/MC/MU806/810/
814 devices.
B1
X
B1
X