Datasheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 96 2009-2012 Microchip Technology Inc.
TABLE 4-35: CRC REGISTER MAP
TABLE 4-34: PARALLEL MASTER/SLAVE PORT REGISTER MAP
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PMCON 0600 PMPEN — PSIDL ADRMUX<1:0> PTBEEN PTWREN PTRDEN CSF<1:0> ALP CS2P CS1P BEP WRSP RDSP
0000
PMMODE 0602 BUSY IRQM<1:0> INCM<1:0> MODE16 MODE<1:0> WAITB<1:0> WAITM<3:0> WAITE<1:0>
0000
PMADDR
(1)
0604 CS2 CS1 Parallel Port Address (ADDR<13:0>)
0000
PMDOUT1
(1)
0604 Parallel Port Data Out Register 1 (Buffers Level 0 and 1)
0000
PMDOUT2 0606 Parallel Port Data Out Register 2 (Buffers Level 2 and 3)
0000
PMDIN1 0608 Parallel Port Data In Register 1 (Buffers Level 0 and 1)
0000
PMDIN2 060A Parallel Port Data In Register 2 (Buffers Level 2 and 3)
0000
PMAEN 060C PTEN15 PTEN14 PTEN13 PTEN12 PTEN11 PTEN10 PTEN9 PTEN8 PTEN7 PTEN6 PTEN5 PTEN4 PTEN3 PTEN2 PTEN1 PTEN0
0000
PMSTAT 060E IBF IBOV — — IB3F IB2F IB1F IB0F OBE OBUF — — OB3E OB2E OB1E OB0E
008F
Legend:
— = unimplemented, read as ‘
0
’. Shaded bits are not used in the operation of the PMP module.
Note 1:
PMADDR and PMDOUT1 are the same physical register, but are defined differently depending on the module’s operating mode.
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
CRCCON1 0640 CRCEN
— CSIDL VWORD<4:0> CRCFUL CRCMPT CRCISEL CRCGO LENDIAN — — — 0000
CRCCON2 0642
— — — DWIDTH<4:0> — — — PLEN<4:0> 0000
CRCXORL 0644 X<15:1>
— 0000
CRCXORH 0646 X<31:16> 0000
CRCDATL 0648 CRC Data Input Low Word 0000
CRCDATH 064A CRC Data Input High Word 0000
CRCWDATL 064C CRC Result Low Word 0000
CRCWDATH 064E CRC Result High Word 0000
Legend: — = unimplemented, read as ‘0’. Shaded bits are not used in the operation of the programmable CRC module.
TABLE 4-36: REAL-TIME CLOCK AND CALENDAR REGISTER MAP
File Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
ALRMVAL 0620 Alarm Value Register Window based on ALRMPTR<1:0>
xxxx
ALCFGRPT 0622 ALRMEN CHIME AMASK<3:0> ALRMPTR<1:0> ARPT<7:0>
0000
RTCVAL 0624 RTCC Value Register Window based on RTCPTR<1:0>
xxxx
RCFGCAL 0626 RTCEN — RTCWREN RTCSYNC HALFSEC RTCOE RTCPTR<1:0> CAL<7:0>
0000
Legend:
x
= unknown value on Reset, — = unimplemented, read as ‘
0
’. Reset values are shown in hexadecimal.