Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 178  2009-2012 Microchip Technology Inc.
FIGURE 9-1: OSCILLATOR SYSTEM DIAGRAM
Note 1: See Figure 9-2 for PLL and FVCO details.
2: If the oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 M must be connected.
3: See Figure 9-3 for APLL details.
Secondary Oscillator (SOSC)
LPOSCEN
SOSCO
SOSCI
Timer1
XTPLL, HSPLL,
XT, HS, EC
FRCDIV<2:0>
WDT, PWRT,
FRCDIVN
SOSC
FRCDIV16
ECPLL, FRCPLL
NOSC<2:0> FNOSC<2:0>
Reset
FRC
Oscillator
LPRC
Oscillator
DOZE<2:0>
S3
S1
S2
S1/S3
S7
S6
FRC
LPRC
S0
S5
S4
÷ 16
Clock Switch
S7
Clock Fail
÷ 2
TUN<5:0>
PLL
(1)
FCY
FOSC
FRCDIV
DOZE
FSCM
ACLK
POSCCLK
Auxiliary Oscillator
SELACLK
USB
FVCO
(1)
ENAPLL
ASRCSEL ENAPLL
APLL
(3)
POSCCLK
FRCCLK
F
VCO
(1)
÷N
APLLPOST<2:0>
FRCCLK
FRCSEL
OSC2
OSC1
Primary Oscillator (POSC)
R
(2)
POSCMD<1:0>
FP
FAVCO
ROSEL
RODIV<3:0>
REFCLKO
POSCCLK
RPn
F
OSC
Reference Clock Generation
Auxiliary Clock Generation
(dsPIC33EPXXMU8XX and
PIC24EPXXXGU8XX Devices Only)
÷ N