Datasheet

dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 16  2009-2012 Microchip Technology Inc.
E1 AN19/RPI52/RC4 J8 No Connect
E2 AN18/RPI51/RC3 J9 No Connect
E3 C1IN3-/SCK2/PMA5/RP118/RG6 J10 RP104/RF8
E4 AN17/RPI50/RC2 J11 D-/RG3
(5)
E5 No Connect K1 PGEC3/AN1/RPI33/RB1
E6 RP113/RG1 K2 PGED3/AN0/RPI32/RB0
E7 No Connect K3 V
REF+/RA10
K4 AN8/PMA6/RPI40/RB8 L3 AV
SS
K5 No Connect L4 AN9/PMA7/RPI41/RB9
K6 RP108/RF12 L5 AN10/CV
REF/PMA13/RPI42/RB10
K7 AN14/PMA1/RPI46/RB14 L6 RP109/RF13
K8 V
DD L7 AN13/PMA10/RPI45/RB13
K9 RP79/RD15 L8 AN15/PMA0/RPI47/RB15
K10 USBID/RP99/RF3 L9 RPI78/RD14
K11 RP98/RF2 L10 SDA2
(3)
/PMA9/RP100/RF4
L1 PGEC1/AN6/RPI38/RB6 L11 SCL2
(3)
/PMA8/RP101/RF5
L2 V
REF-/RA9
TABLE 3: PIN NAMES: PIC24EP256GU810 AND PIC24EP512GU810
DEVICES
(1,2)
(CONTINUED)
Pin
Number
Full Pin Name
Pin
Number
Full Pin Name
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 “Peripheral Pin Select” for
available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 “I/O Ports” for more information.
3: The availability of I
2
C™ interfaces varies by device. Selection (SDAx/SCLx or ASDAx/ASCLx) is made using the device Configuration bits,
ALTI2C1 and ALTI2C2 (FPOR<5:4>). See Section 29.0 “Special Features” for more information.
4: The pin name is SCL1/RG2 for the dsPIC33EP512(GP/MC)806 and PIC24EP512GP806 devices.
5: The pin name is SDA1/RG3 for the dsPIC33EP512(GP/MC)806 and PIC24EP512GP806 devices.