Datasheet
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
DS70616G-page 472 2009-2012 Microchip Technology Inc.
bit 1-0 WAITE<1:0>: Data Hold After Strobe Wait State Configuration bits
(1,2,3)
11 = Wait of 4 TP
10 = Wait of 3 TP
01 = Wait of 2 TP
00 = Wait of 1 TP
REGISTER 28-2: PMMODE: PARALLEL MASTER PORT MODE REGISTER (CONTINUED)
Note 1: The applied Wait state depends on whether data and address are multiplexed or demultiplexed. See
Section 28.4.1.8. “Wait States” in Section 28. “Parallel Master Port (PMP)” (DS70576) in the
“dsPIC33E/PIC24E Family Reference Manual” for more information.
2: WAITB<1:0> and WAITE<1:0> bits are ignored whenever WAITM<3:0> = 0000.
3: T
P = 1/FP.