Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X DS70000657H-page 70  2011-2013 Microchip Technology Inc.
INTCON1 08C0 NSTDIS OVAERR OVBERR COVAERR COVBERR OVATE OVBTE COVTE SFTACERR DIV0ERR DMACERR MATHERR ADDRERR STKERR OSCFAIL — 0000
INTCON2 08C2 GIE DISI SWTRAP
— — — — — — — — — — INT2EP INT1EP INT0EP 8000
INTCON3 08C4
— — — — — — — — — —DAEDOOVR— — — — 0000
INTCON4 08C6
— — — — — — — — — — — — — — —SGHT0000
INTTREG 08C8
— — — — ILR<3:0> VECNUM<7:0> 0000
TABLE 4-5: INTERRUPT CONTROLLER REGISTER MAP FOR dsPIC33EPXXXGP50X DEVICES ONLY (CONTINUED)
File
Name
Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
Legend: — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.