Datasheet

 2011-2013 Microchip Technology Inc. DS70000657H-page 523
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
TyCON (Timer3 and Timer5 Control)........................ 211
UxMODE (UARTx Mode).......................................... 283
UxSTA (UARTx Status and Control)......................... 285
VEL1CNT (Velocity Counter 1) ................................. 259
Resets............................................................................... 123
Brown-out Reset (BOR)............................................ 123
Configuration Mismatch Reset (CM)......................... 123
Illegal Condition Reset (IOPUWR)............................ 123
Illegal Opcode................................................... 123
Security............................................................. 123
Uninitialized W Register.................................... 123
Master Clear (MCLR
) Pin Reset ............................... 123
Power-on Reset (POR)............................................. 123
RESET Instruction (SWR)......................................... 123
Resources................................................................. 124
Trap Conflict Reset (TRAPR).................................... 123
Watchdog Timer Time-out Reset (WDTO)................ 123
Resources Required for Digital PFC............................. 32, 34
Revision History ................................................................ 507
S
Serial Peripheral Interface (SPI) ....................................... 265
Software Stack Pointer (SSP)........................................... 111
Special Features of the CPU ............................................ 379
SPI
Control Registers ...................................................... 268
Helpful Tips............................................................... 267
Resources................................................................. 267
T
Temperature and Voltage Specifications
AC ..................................................................... 413, 471
Thermal Operating Conditions .......................................... 402
Thermal Packaging Characteristics .................................. 402
Timer1............................................................................... 203
Control Register........................................................ 205
Resources................................................................. 204
Timer2/3 and Timer4/5...................................................... 207
Control Registers ...................................................... 210
Resources................................................................. 209
Timing Diagrams
10-Bit ADC Conversion (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 0, SSRC<2:0> = 000,
SSRCG = 0)...................................................... 464
10-Bit ADC Conversion (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 1, SSRC<2:0> = 111,
SSRCG = 0, SAMC<4:0> = 00010) .................. 464
12-Bit ADC Conversion (ASAM = 0,
SSRC<2:0> = 000, SSRCG = 0) ...................... 462
BOR and Master Clear Reset ................................... 416
ECANx I/O ................................................................ 454
External Clock........................................................... 414
High-Speed PWMx Fault .......................................... 422
High-Speed PWMx Module....................................... 422
I/O Characteristics .................................................... 416
I2Cx Bus Data (Master Mode) .................................. 450
I2Cx Bus Data (Slave Mode) .................................... 452
I2Cx Bus Start/Stop Bits (Master Mode) ................... 450
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 452
Input Capture x (ICx) ................................................ 420
OCx/PWMx............................................................... 421
Output Compare x (OCx).......................................... 421
QEA/QEB Input ........................................................ 424
QEI Module Index Pulse........................................... 425
SPI1 Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1) ........................................... 441
SPI1 Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1) ........................................... 440
SPI1 Master Mode (Half-Duplex, Transmit Only,
CKE = 0) ........................................................... 438
SPI1 Master Mode (Half-Duplex, Transmit Only,
CKE = 1) ........................................................... 439
SPI1 Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0)........................................... 448
SPI1 Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0)........................................... 446
SPI1 Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0)........................................... 442
SPI1 Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0)........................................... 444
SPI2 Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1) ........................................... 429
SPI2 Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1) ........................................... 428
SPI2 Master Mode (Half-Duplex, Transmit Only,
CKE = 0) ........................................................... 426
SPI2 Master Mode (Half-Duplex, Transmit Only,
CKE = 1) ........................................................... 427
SPI2 Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0)........................................... 436
SPI2 Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0)........................................... 434
SPI2 Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0)........................................... 430
SPI2 Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0)........................................... 432
Timer1-Timer5 External Clock .................................. 418
TimerQ (QEI Module) External Clock ....................... 423
UARTx I/O ................................................................ 454
U
Universal Asynchronous Receiver
Transmitter (UART) .................................................. 281
Control Registers ...................................................... 283
Helpful Tips............................................................... 282
Resources ................................................................ 282
User ID Words .................................................................. 384
V
Voltage Regulator (On-Chip) ............................................ 384
W
Watchdog Timer (WDT)............................................ 379, 385
Programming Considerations ................................... 385
WWW Address ................................................................. 524
WWW, On-Line Support ..................................................... 23