Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 522  2011-2013 Microchip Technology Inc.
DMAxSTAH (DMA Channel x
Start Address A, High) ......................................144
DMAxSTAL (DMA Channel x
Start Address A, Low).......................................144
DMAxSTBH (DMA Channel x
Start Address B, High) ......................................145
DMAxSTBL (DMA Channel x
Start Address B, Low).......................................145
DSADRH (DMA Most Recent RAM
High Address) ...................................................147
DSADRL (DMA Most Recent RAM
Low Address).................................................... 147
DTRx (PWMx Dead-Time) ........................................ 238
FCLCONx (PWMx Fault Current-Limit Control) ........ 243
I2CxCON (I2Cx Control) ........................................... 276
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 280
I2CxSTAT (I2Cx Status) ........................................... 278
ICxCON1 (Input Capture x Control 1) ....................... 215
ICxCON2 (Input Capture x Control 2) ....................... 216
INDX1CNTH (Index Counter 1 High Word) .............. 259
INDX1CNTL (Index Counter 1 Low Word)................ 259
INDX1HLD (Index Counter 1 Hold) ........................... 260
INT1HLDH (Interval 1 Timer Hold High Word).......... 264
INT1HLDL (Interval 1 Timer Hold Low Word) ........... 264
INT1TMRH (Interval 1 Timer High Word).................. 263
INT1TMRL (Interval 1 Timer Low Word) ................... 263
INTCON1 (Interrupt Control 1)..................................134
INTCON2 (Interrupt Control 2)..................................136
INTCON2 (Interrupt Control 3)..................................137
INTCON4 (Interrupt Control 4)..................................137
INTTREG (Interrupt Control and Status)................... 138
IOCONx (PWMx I/O Control) ....................................240
LEBCONx (PWMx Leading-Edge
Blanking Control) ..............................................245
LEBDLYx (PWMx Leading-Edge
Blanking Delay).................................................246
MDC (PWMx Master Duty Cycle)..............................234
NVMADRH (Nonvolatile Memory Address High) ...... 122
NVMADRL (Nonvolatile Memory Address Low)........ 122
NVMCON (Nonvolatile Memory (NVM) Control) ....... 121
NVMKEY (Nonvolatile Memory Key) ........................ 122
OCxCON1 (Output Compare x Control 1) ................ 221
OCxCON2 (Output Compare x Control 2) ................ 223
OSCCON (Oscillator Control) ................................... 156
OSCTUN (FRC Oscillator Tuning) ............................161
PDCx (PWMx Generator Duty Cycle) ....................... 237
PHASEx (PWMx Primary Phase-Shift) .....................237
PLLFBD (PLL Feedback Divisor).............................. 160
PMD1 (Peripheral Module Disable Control 1)........... 166
PMD2 (Peripheral Module Disable Control 2)........... 168
PMD3 (Peripheral Module Disable Control 3)........... 169
PMD4 (Peripheral Module Disable Control 4)........... 169
PMD6 (Peripheral Module Disable Control 6)........... 170
PMD7 (Peripheral Module Disable Control 7)........... 171
POS1CNTH (Position Counter 1 High Word) ........... 258
POS1CNTL (Position Counter1 Low Word).............. 258
POS1HLD (Position Counter 1 Hold) ........................ 258
PTCON (PWMx Time Base Control)......................... 230
PTCON2 (PWMx Primary Master Clock
Divider Select 2)................................................ 232
PTGADJ (PTG Adjust) ..............................................348
PTGBTE (PTG Broadcast Trigger Enable) ............... 343
PTGC0LIM (PTG Counter 0 Limit)............................ 346
PTGC1LIM (PTG Counter 1 Limit)............................ 347
PTGCON (PTG Control) ........................................... 342
PTGCST (PTG Control/Status)................................. 340
PTGHOLD (PTG Hold) ............................................. 347
PTGL0 (PTG Literal 0).............................................. 348
PTGQPTR (PTG Step Queue Pointer) ..................... 349
PTGQUEx (PTG Step Queue x) ............................... 349
PTGSDLIM (PTG Step Delay Limit) ......................... 346
PTGT0LIM (PTG Timer0 Limit)................................. 345
PTGT1LIM (PTG Timer1 Limit)................................. 345
PTPER (PWMx Primary Master Time
Base Period)..................................................... 233
PWMCONx (PWMx Control)..................................... 235
QEI1CON (QEI1 Control) ......................................... 252
QEI1GECH (QEI1 Greater Than or Equal
Compare High Word)........................................ 262
QEI1GECL (QEI1 Greater Than or Equal
Compare Low Word) ........................................ 262
QEI1ICH (QEI1 Initialization/Capture
High Word) ....................................................... 260
QEI1ICL (QEI1 Initialization/Capture
Low Word) ........................................................ 260
QEI1IOC (QEI1 I/O Control) ..................................... 254
QEI1LECH (QEI1 Less Than or Equal
Compare High Word)........................................ 261
QEI1LECL (QEI1 Less Than or Equal
Compare Low Word) ........................................ 261
QEI1STAT (QEI1 Status).......................................... 256
RCON (Reset Control).............................................. 125
REFOCON (Reference Oscillator Control) ............... 162
RPINR0 (Peripheral Pin Select Input 0).................... 183
RPINR1 (Peripheral Pin Select Input 1).................... 184
RPINR11 (Peripheral Pin Select Input 11)................ 187
RPINR12 (Peripheral Pin Select Input 12)................ 188
RPINR14 (Peripheral Pin Select Input 14)................ 189
RPINR15 (Peripheral Pin Select Input 15)................ 190
RPINR18 (Peripheral Pin Select Input 18)................ 191
RPINR19 (Peripheral Pin Select Input 19)................ 191
RPINR22 (Peripheral Pin Select Input 22)................ 192
RPINR23 (Peripheral Pin Select Input 23)................ 193
RPINR26 (Peripheral Pin Select Input 26)................ 193
RPINR3 (Peripheral Pin Select Input 3).................... 184
RPINR37 (Peripheral Pin Select Input 37)................ 194
RPINR38 (Peripheral Pin Select Input 38)................ 195
RPINR39 (Peripheral Pin Select Input 39)................ 196
RPINR7 (Peripheral Pin Select Input 7).................... 185
RPINR8 (Peripheral Pin Select Input 8).................... 186
RPOR0 (Peripheral Pin Select Output 0).................. 197
RPOR1 (Peripheral Pin Select Output 1).................. 197
RPOR2 (Peripheral Pin Select Output 2).................. 198
RPOR3 (Peripheral Pin Select Output 3).................. 198
RPOR4 (Peripheral Pin Select Output 4).................. 199
RPOR5 (Peripheral Pin Select Output 5).................. 199
RPOR6 (Peripheral Pin Select Output 6).................. 200
RPOR7 (Peripheral Pin Select Output 7).................. 200
RPOR8 (Peripheral Pin Select Output 8).................. 201
RPOR9 (Peripheral Pin Select Output 9).................. 201
SEVTCMP (PWMx Primary Special
Event Compare) ............................................... 233
SPIxCON1 (SPIx Control 1)...................................... 270
SPIxCON2 (SPIx Control 2)...................................... 272
SPIxSTAT (SPIx Status and Control) ....................... 268
SR (CPU STATUS)............................................. 40, 132
T1CON (Timer1 Control) .......................................... 205
TRGCONx (PWMx Trigger Control) ......................... 239
TRIGx (PWMx Primary Trigger Compare Value)...... 242
TxCON (Timer2 and Timer4 Control) ....................... 210