Datasheet

dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
DS70000657H-page 520  2011-2013 Microchip Technology Inc.
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Packaging ......................................................................... 479
Details ....................................................................... 505
Marking ............................................................. 479, 481
Peripheral Module Disable (PMD)..................................... 165
Peripheral Pin Select (PPS) .............................................. 175
Available Peripherals ................................................ 175
Available Pins ........................................................... 175
Control ......................................................................175
Control Registers ......................................................183
Input Mapping ........................................................... 176
Output Selection for Remappable Pins..................... 180
Pin Selection for Selectable Input Sources............... 178
Selectable Input Sources .......................................... 177
Peripheral Trigger Generator (PTG) Module..................... 337
PICkit 3 In-Circuit Debugger/Programmer ........................ 399
Pinout I/O Descriptions (table) ............................................ 26
Power-Saving Features.....................................................163
Clock Frequency ....................................................... 163
Clock Switching.........................................................163
Instruction-Based Modes .......................................... 163
Idle ....................................................................164
Interrupts Coincident with Power
Save Instructions ...................................... 164
Sleep.................................................................164
Resources.................................................................165
Program Address Space ..................................................... 45
Construction..............................................................117
Data Access from Program Memory Using
Table Instructions.............................................. 118
Memory Map (dsPIC33EP128GP50X,
dsPIC33EP128MC20X/50X,
PIC24EP128GP/MC20X Devices) ...................... 47
Memory Map (dsPIC33EP256GP50X,
dsPIC33EP256MC20X/50X,
PIC24EP256GP/MC20X Devices) ...................... 48
Memory Map (dsPIC33EP32GP50X,
dsPIC33EP32MC20X/50X,
PIC24EP32GP/MC20X Devices) ........................ 45
Memory Map (dsPIC33EP512GP50X,
dsPIC33EP512MC20X/50X,
PIC24EP512GP/MC20X Devices) ...................... 49
Memory Map (dsPIC33EP64GP50X,
dsPIC33EP64MC20X/50X,
PIC24EP64GP/MC20X Devices) ........................ 46
Table Read High Instructions
TBLRDH............................................................ 118
Table Read Low Instructions (TBLRDL) ................... 118
Program Memory
Organization................................................................ 50
Reset Vector ...............................................................50
Programmable CRC Generator......................................... 373
Control Registers ......................................................375
Overview ...................................................................374
Resources.................................................................374
Programmer’s Model........................................................... 37
Register Descriptions.................................................. 37
PTG
Control Registers ......................................................340
Introduction ............................................................... 337
Output Descriptions .................................................. 353
Resources.................................................................339
Step Commands and Format .................................... 350
Q
QEI
Control Registers ...................................................... 252
Resources ................................................................ 251
Quadrature Encoder Interface (QEI)................................. 249
R
Register Maps
ADC1 .......................................................................... 84
CPU Core (dsPIC33EPXXXMC20X/50X,
dsPIC33EPXXXGP50X Devices) ....................... 63
CPU Core (PIC24EPXXXGP/MC20X Devices) .......... 65
CRC ............................................................................ 88
CTMU ......................................................................... 97
DMAC ......................................................................... 98
ECAN1 (When WIN (C1CTRL1) = 0 or 1)
for dsPIC33EPXXXMC/GP50X Devices............. 85
ECAN1 (When WIN (C1CTRL1) = 0) for
dsPIC33EPXXXMC/GP50X Devices.................. 85
ECAN1 (WIN (C1CTRL1) = 1) for
dsPIC33EPXXXMC/GP50X Devices.................. 86
I2C1 and I2C2 ............................................................ 82
Input Capture 1 through Input Capture 4.................... 76
Interrupt Controller
(dsPIC33EPXXXGP50X Devices) ...................... 69
Interrupt Controller
(dsPIC33EPXXXMC20X Devices)...................... 71
Interrupt Controller
(dsPIC33EPXXXMC50X Devices)...................... 73
Interrupt Controller
(PIC24EPXXXGP20X Devices).......................... 66
Interrupt Controller
(PIC24EPXXXMC20X Devices) ......................... 67
JTAG Interface ........................................................... 97
NVM............................................................................ 93
Op Amp/Comparator................................................... 97
Output Compare 1 through Output Compare 4 .......... 77
Peripheral Pin Select Input
(dsPIC33EPXXXGP50X Devices) ...................... 91
Peripheral Pin Select Input
(dsPIC33EPXXXMC20X Devices)...................... 92
Peripheral Pin Select Input
(dsPIC33EPXXXMC50X Devices)...................... 91
Peripheral Pin Select Input
(PIC24EPXXXGP20X Devices).......................... 90
Peripheral Pin Select Input
(PIC24EPXXXMC20X Devices) ......................... 90
Peripheral Pin Select Output
(dsPIC33EPXXXGP/MC202/502,
PIC24EPXXXGP/MC202 Devices)..................... 88
Peripheral Pin Select Output
(dsPIC33EPXXXGP/MC203/503,
PIC24EPXXXGP/MC203 Devices)..................... 88
Peripheral Pin Select Output
(dsPIC33EPXXXGP/MC204/504,
PIC24EPXXXGP/MC204 Devices)..................... 89
Peripheral Pin Select Output
(dsPIC33EPXXXGP/MC206/506,
PIC24EPXXGP/MC206 Devices) ....................... 89
PMD (dsPIC33EPXXXGP50X Devices) ..................... 95
PMD (dsPIC33EPXXXMC20X Devices)..................... 96
PMD (dsPIC33EPXXXMC50X Devices)..................... 95
PMD (PIC24EPXXXGP20X Devices)......................... 94