Datasheet

 2011-2013 Microchip Technology Inc. DS70000657H-page 5
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
Pin Diagrams
28-Pin SPDIP/SOIC/SSOP
(1,2)
Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4
“Peripheral Pin Select (PPS)” for available peripherals and for information on limitations.
2: Every I/O port pin (RAx-RGx) can be used as a Change Notification pin (CNAx-CNGx). See Section 11.0 “I/O
Ports” for more information.
3: There is an internal pull-up resistor connected to the TMS pin when the JTAG interface is active. See the
JTAGEN bit field in Table 27-2.
= Pins are up to 5V tolerant
MCLR AVDD
AN0/OA2OUT/RA0
AV
SS
AN1/C2IN1+/RA1 RPI47/T5CK/RB15
PGED3/V
REF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 RPI46/T3CK/RB14
PGEC3/V
REF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI45/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2 RPI44/RB12
PGED1/AN5/C1IN1-/RP35/RB3
TDI/RP43/RB11
TDO/RP42/RB10
OSC1/CLKI/RA2 V
CAP
OSC2/CLKO/RA3 VSS
RP36/RB4
TMS/ASDA1/SDI1/RP41/RB9
(3)
CVREF2O/RP20/T1CK/RA4 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
V
DD SCK1/RP39/INT0/RB7
PGED2/ASDA2/RP37/RB5
PGEC2/ASCL2/RP38/RB6
V
SS
MCLR
AVDD
AN0/OA2OUT/RA0
AV
SS
AN1/C2IN1+/RA1 RPI47/PWM1L/T5CK/RB15
PGED3/V
REF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0
RPI46/PWM1H/T3CK/RB14
PGEC3/V
REF+/AN3/OA1OUT/RPI33/CTED1/RB1
RPI45/PWM2L/CTPLS/RB13
PGEC1/AN4/C1IN1+/RPI34/RB2
RPI44/PWM2H/RB12
PGED1/AN5/C1IN1-/RP35/RB3
TDI/RP43/PWM3L/RB11
TDO/RP42/PWM3H/RB10
OSC1/CLKI/RA2
V
CAP
OSC2/CLKO/RA3
V
SS
FLT32/RP36/RB4 TMS/ASDA1/SDI1/RP41/RB9
(3)
CVREF2O/RP20/T1CK/RA4 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8
V
DD
SCK1/RP39/INT0/RB7
PGED2/ASDA2/RP37/RB5
PGEC2/ASCL2/RP38/RB6
V
SS
1
28
2
27
3
26
425
5
24
6
23
7
22
8
21
920
10
19
11
18
12
17
13
16
14 15
PIC24EPXXXGP202
dsPIC33EPXXXGP502
1
28
2
27
3
26
425
524
623
722
821
920
10
19
11
18
12 17
13 16
14
15
PIC24EPXXXMC202
dsPIC33EPXXXMC202/502