Datasheet

 2011-2013 Microchip Technology Inc. DS70000657H-page 441
dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X AND PIC24EPXXXGP/MC20X
FIGURE 30-25: SPI1 MASTER MODE (FULL-DUPLEX, CKE = 0, CKP = x, SMP = 1)
TIMING CHARACTERISTICS
TABLE 30-44: SPI1 MASTER MODE (FULL-DUPLEX, CKE = 0, CKP = x, SMP = 1)
TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  T
A  +125°C for Extended
Param. Symbol Characteristic
(1)
Min. Typ.
(2)
Max. Units Conditions
SP10 FscP Maximum SCK1 Frequency — — 10 MHz -40ºC to +125ºC
(Note 3)
SP20 TscF SCK1 Output Fall Time — — — ns See Parameter DO32
(Note 4)
SP21 TscR SCK1 Output Rise Time — — — ns See Parameter DO31
(Note 4)
SP30 TdoF SDO1 Data Output Fall Time — — — ns See Parameter DO32
(Note 4)
SP31 TdoR SDO1 Data Output Rise Time — — — ns See Parameter DO31
(Note 4)
SP35 TscH2doV,
TscL2doV
SDO1 Data Output Valid after
SCK1 Edge
—620ns
SP36 TdoV2scH,
TdoV2scL
SDO1 Data Output Setup to
First SCK1 Edge
30 ——ns
SP40 TdiV2scH,
TdiV2scL
Setup Time of SDI1 Data
Input to SCK1 Edge
30 ——ns
SP41 TscH2diL,
Ts c L 2 d i L
Hold Time of SDI1 Data Input
to SCK1 Edge
30 ——ns
Note 1: These parameters are characterized, but are not tested in manufacturing.
2: Data in “Typical” column is at 3.3V, +25°C unless otherwise stated.
3: The minimum clock period for SCK1 is 100 ns. The clock generated in Master mode must not violate this
specification.
4: Assumes 50 pF load on all SPI1 pins.
SCK1
(CKP = 0)
SCK1
(CKP = 1)
SDO1
SDI1
SP40 SP41
SP21SP20
SP35
SP20SP21
MSb LSbBit 14 - - - - - -1
LSb InBit 14 - - - -1
SP30, SP31SP30, SP31
Note: Refer to Figure 30-1 for load conditions.
SP36
MSb In
SP10